Data Sheet

ADRF5048

APPLICATIONS INFORMATION

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Rev. A | 12 of 13

The ADRF5048 has two power supply pins (VDD and VSS) and

four control pins (V1, V2, LS, and EN). Figure 24 shows the

external components and connections for the supply and control

pins. The VDD pin and the VSS pin are decoupled with a 100

pF multilayer ceramic capacitor. The ADRF5048 pinout allows the

placement of the decoupling capacitors close to the device. No

other external components are needed for bias and operation,

except DC blocking capacitors on the RFx pins when the RF lines

are biased at a voltage different than 0 V. Refer to Pin Configuration

and Function Descriptions section for further details.

Figure 24. Recommended Schematic

RECOMMENDATIONS FOR PCB DESIGN

The RF ports are matched to 50 Ω internally, and the pinout is

designed to mate a coplanar waveguide (CPWG) with 50 Ω charac-

teristic impedance on the PCB. Figure 25 shows the referenced

CPWG RF trace design for an RF substrate with 8 mil thick Rogers

RO4003 dielectric material. The RF trace with a 14 mil width and

a 7 mil clearance is recommended for 2.2 mil finished copper

thickness.

Figure 25. Example PCB Stackup

Figure 26 shows the routing of the RF traces, supply, and control

signals from the ADRF5048. The ground planes are connected with

as many filled through vias as allowed for optimal RF and thermal

performance. The primary thermal path for the ADRF5048 is the

bottom side.

Figure 26. PCB Routings

Figure 27 shows the recommended layout from the device RFx

pins to the 50 Ω CPWG on the referenced stackup. PCB pads are

drawn 1:1 to the device pads. The ground pads are drawn solder

mask defined, and the signal pads are drawn as pad defined. The

RF trace from the PCB pad is extended with the same width until

the package edge and tapered to the RF trace with a 45° angle.

The paste mask is also designed to match the pad without any

aperture reduction. The paste is divided into multiple openings for

the paddle.

Figure 27. Recommended RFx Pin Transitions

For alternate PCB stackups with different dielectric thickness and

CPWG design, contact Analog Devices, Inc., Technical Support

Request for further recommendations.