Specification
NET2270 USB Interface Controller
______________________________________________________________________________
NetChip Technology, Inc., 2003
335 Pioneer Way, Mountain View, California 94041
TEL (650) 526-1490
FAX (650) 526-1494
http://www.netchip.com
Rev 3.6, April 17, 2003
60
8.6
Endpoint Registers
There are 4 sets of endpoint registers, one for each endpoint. To access an endpoint, set the Page Select field of the
PAGESEL register to the desired endpoint, then read or write to an endpoint register as defined below. Status bits
associated with an endpoint packet buffer (Buffer Full, Buffer Empty, etc), are only valid for the currently visible
buffer. The currently visible buffer is the one that is currently being written to or read from by the local bus.
8.6.1 (Address 05h; EP_DATA) Endpoint Data
Note: If DMA Request is enabled, then this register accesses the endpoint buffer selected by DMA Endpoint Select,
rather than Page Select.
Bits
Description
Read
Write
Default
Value
15:8
Endpoint Data (High Order byte).
When operating with a bus width of 16 bits,
bits [15:8] of this register provide the high order byte.
Yes
Yes
0
7:0
Endpoint Data (Low Order byte). When operating with a bus width of 8 bits, bits
[7:0] of this register provide the data for the buffer transaction (read or write). When
operating with a bus width of 16 bits, bits [7:0] of this register provide the low order
byte.
Yes
Yes
0
8.6.2 (Address 06h; EP_STAT0) Endpoint Status Register (low byte)
Note: If DMA Request is enabled, then the Buffer Full and Buffer Empty bits correspond to the endpoint buffer
selected by DMA Endpoint Select, rather than Page Select.
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