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PB50 데이터시트(PDF) 2 Page - Cirrus Logic |
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PB50 데이터시트(HTML) 2 Page - Cirrus Logic |
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2 / 4 page ![]() APEX MICROTECHNOLOGY CORPORATION • 5980 NORTH SHANNON ROAD • TUCSON, ARIZONA 85741 • USA • APPLICATIONS HOTLINE: 1 (800) 546-2739 2 PB50 ABSOLUTE MAXIMUM RATINGS SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS SUPPLY VOLTAGE, +V S to –VS 200V OUTPUT CURRENT, within SOA 2A POWER DISSIPATION, internal at T C = 25°C 1 35W INPUT VOLTAGE, referred to common ±15V TEMPERATURE, pin solder—10 sec max 300°C TEMPERATURE, junction1 150°C TEMPERATURE, storage –65 to +150°C OPERATING TEMPERATURE RANGE, case –55 to +125°C SPECIFICATIONS PARAMETER TESTCONDITIONS2 MIN TYP MAX UNITS INPUT OFFSET VOLTAGE, initial ±.75 ±1.75 V OFFSET VOLTAGE, vs. temperature Full temperature range –4.5 –7 mV/°C INPUT IMPEDANCE, DC 25 50 kΩ INPUT CAPACITANCE 3 pF CLOSED LOOP GAIN RANGE 3 10 25 V/V GAIN ACCURACY, internal Rg, Rf A V = 3 ±10 ±15 % GAIN ACCURACY, external Rf A V = 10 ±15 ±25 % PHASE SHIFT F = 10kHz, AV CL = 10, CC = 22pF 10 ° F = 200kHz, AV CL = 10, CC = 22pF 60 ° OUTPUT VOLTAGE SWING Io = 2A V S–11 V S –9 V VOLTAGE SWING Io = 1A V S–10 V S –7 V VOLTAGE SWING Io = .1A V S–8 V S –5 V CURRENT, continuous 2 A SLEW RATE Full temperature range 50 100 V/µs CAPACITIVE LOAD Full temperature range 2200 pF SETTLING TIME to .1% R L = 100Ω, 2V step 2 µs POWER BANDWIDTH V C = 100Vpp 160 320 kHz SMALL SIGNAL BANDWIDTH C C = 22pF, AV = 25, Vcc = ±100 100 kHz SMALL SIGNAL BANDWIDTH C C = 22pF, AV = 3, Vcc = ±30 1 MHz POWERSUPPLY VOLTAGE, ±V S 3 Full temperature range ±305 ±60 ±100 V CURRENT, quiescent V S = ±30 9 12 mA V S = ±60 12 18 mA V S = ±100 17 25 mA THERMAL RESISTANCE, AC junction to case4 Full temp. range, F > 60Hz 1.8 2.0 °C/W RESISTANCE, DC junction to case Full temp. range, F < 60Hz 3.2 3.5 °C/W RESISTANCE, junction to air Full temperature range 30 °C/W TEMPERATURE RANGE, case Meets full range specifications –25 25 85 °C NOTES: 1. Long term operation at the maximum junction temperature will result in reduced product life. Derate internal power dissipation to achieve high MTTF (Mean Time to Failure). 2. The power supply voltage specified under typical (TYP) applies, T C = 25°C unless otherwise noted. 3. +V S and –VS denote the positive and negative supply rail respectively. 4. Rating applies if the output current alternates between both output transistors at a rate faster than 60Hz. 5. +V S must be at least 15V above COM, –VS must be at least 30V below COM. The PB50 is constructed from MOSFET transistors. ESD handling procedures must be observed. The internal substrate contains beryllia (BeO). Do not break the seal. If accidentally broken, do not crush, machine, or subject to temperatures in excess of 850°C to avoid generating toxic fumes. CAUTION |
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