CS8405A

22

DS469F2

8.9

Interrupt 1 Mode MSB (0Ah) and Interrupt 1 Mode LSB (0Bh)

The two Interrupt Mode registers form a 2-bit code for each Interrupt Register 1 function. There are

three ways to set the INT pin active in accordance with the interrupt condition. In the Rising edge ac-

tive mode, the INT pin becomes active on the arrival of the interrupt condition. In the Falling edge ac-

tive mode, the INT pin becomes active on the removal of the interrupt condition. In Level active mode,

the INT interrupt pin becomes active during the interrupt condition. Be aware that the active level (Ac-

tice High or Low) only depends on the INT[1:0] bits. These registers default to 00.

00 - Rising edge active

01 - Falling edge active

10 - Level active

11 - Reserved

8.10

Interrupt 2 Mask (0Ch)

The bits of this register serve as a mask for the Interrupt 2 register. If a mask bit is set to 1, the error

is unmasked, meaning that its occurrence will affect the INT pin and the status register. If a mask bit

is set to 0, the error is masked, meaning that its occurrence will not affect the INT pin or the status

register. The bit positions align with the corresponding bits in Interrupt 2 register. This register defaults

to 00h.

8.11

Interrupt 2 Mode MSB (0Dh) and Interrupt Mode 2 LSB (0Eh)

The two Interrupt Mode registers form a 2-bit code for each Interrupt Register 1 function. There are

three ways to set the INT pin active in accordance with the interrupt condition. In the Rising edge ac-

tive mode, the INT pin becomes active on the arrival of the interrupt condition. In the Falling edge ac-

tive mode, the INT pin becomes active on the removal of the interrupt condition. In Level active mode,

the INT interrupt pin becomes active during the interrupt condition. Be aware that the active level (Ac-

tive High or Low) only depends on the INT[1:0] bits. These registers default to 00.

00 - Rising edge active

01 - Falling edge active

10 - Level active

11 - Reserved

7

6

5

43210

TSLIP1

0

0

0

0

0

EFTC1

0

TSLIP0

0

0

0

0

0

EFTC0

0

7

6

5

43210

00

0

0

0

EFTUM

0

0

7

6

5

43210

0

0

0

0

0

EFTU1

0

0

0

0

0

0

0

EFTU0

0

0