P80CL31 datasheet(18/68 Pages) PHILIPS

18 / 68 page

1997 Apr 15

Philips Semiconductors

Product speciﬁcation

Low voltage 8-bit microcontrollers with

UART

P80CL31; P80CL51

12.3

Wake-up from Power-down mode

When in Power-down mode the controller can be

woken-up with either the external interrupts INT2 to INT9,

or a reset operation. The wake-up operation has two basic

approaches as explained in Section 12.3.1; 12.3.2 and

illustrated in Fig.10.

12.3.1

WAKE-UP USING INT2 TO INT9

If any of the interrupts INT2 to INT9 are enabled, the

device can be woken-up from the Power-down mode with

the external interrupts. To ensure that the oscillator is

stable before the controller restarts, the internal clock will

remain inactive for 1536 oscillator periods. This is

controlled by an on-chip delay counter.

12.3.2

WAKE-UP USING RST

To wake-up the P80CLx1, the RST pin must be kept HIGH

for a minimum of 24 periods. The on-chip delay counter is

inactive. The user must ensure that the oscillator is stable

before any operation is attempted.

12.4

Power Control Register (PCON)

See Tables 2 and 3. Idle and Power-down modes are

activated by software using this SFR. PCON is not

bit-addressable.

12.5

Status of external pins

The status of the external pins during Idle and Power-down

mode is shown in Table 4. If the Power-down mode is

activated whilst accessing external Program Memory, the

port data that is held in the Special Function Register P2 is

restored to Port 2.

If the data is a logic 1, the port pin is held HIGH during the

Power-down mode by the strong pull-up transistor ‘p1’;

see Fig.8(a).

Table 2

Power Control Register (address 87H)

Table 3

Description of PCON bits

Table 4

Status of external pins during Idle and Power-down modes

543210

SMOD

−−

−

GF1

GF0

IDL

BIT

SYMBOL

DESCRIPTION

SMOD

Double Baud rate bit; see description of UART

6, 5, 4

−

reserved

3 and 2

GF1 and GF0 General purpose ﬂag bits

1PD

Power-down bit; setting this bit activates the Power-down mode

IDL

Idle mode bit; setting this bit activates the Idle mode

MODE

MEMORY

ALE

PSEN

PORT 0

PORT 1

PORT 2

PORT 3

PORT 4

Idle

internal

port data

external

ﬂoating

port data

address

port data

Power-down

internal

port data

external

ﬂoating

port data

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