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X5083PIZ 데이터시트(PDF) 15 Page - Intersil Corporation

부품명 X5083PIZ
상세설명  CPU Supervisor with 8Kbit SPI EEPROM
PDF  21 Pages
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제조업체  INTERSIL [Intersil Corporation]
홈페이지  http://www.intersil.com/cda/home
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X5083PIZ 데이터시트(HTML) 15 Page - Intersil Corporation

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15
FN8127.3
June 15, 2006
Equivalent A.C. Load Circuit at 5V VCC
5V
SO
100pF
5V
3.3k
Ω
RESET
30pF
1.64k
Ω
1.64k
Ω
OUTPUT
A.C. Test Conditions
Input pulse levels
VCC x 0.1 to VCC x 0.9
Input rise and fall times
10ns
Input and output timing level
VCC x 0.5
AC Electrical Specifications
(Over recommended operating conditions, unless otherwise specified)
SYMBOL
PARAMETER
2.7V-5.5V
UNIT
MIN
MAX
DATA INPUT TIMING
fSCK
Clock frequency
0
3.3
MHz
tCYC
Cycle time
300
ns
tLEAD
CS lead time
150
ns
tLAG
CS lag time
150
ns
tWH
Clock HIGH time
130
ns
tWL
Clock LOW time
130
ns
tSU
Data setup time
20
ns
tH
Data hold time
20
ns
tRI (Note 3)
Input rise time
2µs
tFI (Note 3)
Input fall time
2µs
tCS
CS deselect time
100
ns
tWC (Note 4)
Write cycle time
10
ms
DATA OUTPUT TIMING
fSCK
Clock frequency
0
3.3
MHz
tDIS
Output disable time
150
ns
tV
Output valid from clock low
130
ns
tHO
Output hold time
0
ns
tRO (Note 3)
Output rise time
50
ns
tFO (Note 3)
Output fall time
50
ns
NOTES:
3. This parameter is periodically sampled and not 100% tested.
4. tWC is the time from the rising edge of CS after a valid write sequence has been sent to the end of the self-timed internal nonvolatile write cycle.
X5083



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