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PCF5083 데이터시트(PDF) 107 Page - NXP Semiconductors |
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PCF5083 데이터시트(HTML) 107 Page - NXP Semiconductors |
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107 / 136 page ![]() 1996 Oct 29 107 Philips Semiconductors Objective specification GSM signal processing IC PCF5083 Table 88 Serial Interface Interrupt Mask Register Note 1. RSTx = 0 means reset condition if either RSTO or RSTC is asserted; ‘ −’ denotes not affected from reset line. During reset (RST, RSTO, RSTC) only those registers with an explicitly given reset value are affected. All other registers are undefined and have to be set by the controller. Table 89 IOM®-2 Interface Configuration Register Note 1. RSTx = 0 means reset condition if either RSTO or RSTC is asserted; ‘ −’ denotes not affected from reset line. During reset (RST, RSTO, RSTC) only those registers with an explicitly given reset value are affected. All other registers are undefined and have to be set by the controller. BIT R/W SYMBOL OPERATION (if bit is set) RST = 0 RSTx=0(1) 0 R/W IMC_OBE_MASK Enable the IMC_OBE flag to assert the SI_INT interrupt condition. 0 − 1 R/W IMC_IBF_MASK Enable the IMC_IBF flag to assert the SI_INT interrupt condition. 0 − 2 R/W TXD_OBE_MASK Enable the TXD_OBE flag to assert the SI_INT interrupt condition. 0 − 3 R/W RXD_IBF_MASK Enable the RXD_IBF flag to assert the SI_INT interrupt condition. 0 − 4 R/W EXT_IOM_MASK Enable the EXT_IOM flag to assert the SI_INT interrupt condition. 0 − BIT R/W SYMBOL OPERATION (if bit is set) RST = 0 RSTx=0(1) 0 R/W IOMEXT_EN Set to a logic 1 to enable the external IOM®-2 interface 0 − 1 R/W IOMEXT_INV Set to a logic 1 to invert the external IOM®-2 lines 0 − 2 R/W CLOCK_MODE0 Select the IOM®-2 clock mode 0 − 3 R/W CLOCK_MODE1 0 − 4 R/W CLOCK_MODE2 0 − 5 R/W DATA_MODE Select the IOM®-2 data mode. 0 − 6 R/W MASTER0_EN Set to a logic 1 to enable the IOM®-2 master unit 0 0 − 7 R/W MASTER1_EN Set to a logic 1 to enable the IOM®-2 master unit 1 0 − 8 R/W MASTER0_TS0 Select the IOM®-2 timeslot for the IOM®-2 master unit 0 0 − 9 R/W MASTER0_TS1 0 − 10 R/W MASTER0_TS2 0 − 11 R/W MASTER0_TS3 0 − 12 R/W MASTER1_TS0 Select the IOM®-2 timeslot for the IOM®-2 master unit 1 0 − 13 R/W MASTER1_TS1 0 − 14 R/W MASTER1_TS2 0 − 15 R/W MASTER1_TS3 0 − |
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