PCF5083HSLASH5V2SLASHF3 datasheet(28/136 Pages) PHILIPS

28 / 136 page

1996 Oct 29

Philips Semiconductors

Objective speciﬁcation

GSM signal processing IC

PCF5083

8.3.2.8

Timing modes Application Examples

Table 14 Timing mode applications

Note

1. The SYNC burst location is defined by MONSTART_REG. If a timing is required with s = MONSTART_REG

≥ 5000,

MONSTART_REG is programmed with s mod 5000 and the second alternative is used.

FRAME

BIT ASSIGNMENT;

SEND

RECON RECMON RECTX

RECRX

ACTION

BCCH Detection

Receiver on at the start of timeslot 0

(MONSTART_REG = 0) in TDMA frame N + 1.

Receiver on.

N + 1 to N + M

Keep receiver on.

N + 1 + M

Receiver off after number of samples deﬁned

by MONSTART_REG, RXLENGTHx_REG and

number of TDMA frames M.

Frequency Estimation

Receive during TS0.

Frame with RX, TX, MON

Receive during RX, MON, transmit during TX.

Frame before idle frame (monitoring)

I-1

Receive during RX, transmit during TX, receiver

on deﬁned by MONSTART_REG.

Idle frame (monitoring)

Receiver off deﬁned by MONSTART_REG and

RXLENGTHx_REG.

Frame with RX, TX, MON

I-1

or(1)

Receive during RX, MON, transmit during T.

I-1

Receive during RX, transmit during TX.

Idle frame (SYNC burst reading)

or(1)

No operation.

Receive during MON.

Three level measurements

Receive during RX, TX and MON slot.

Send access burst

Transmit during TX.

PCF5083H/5V2/F3 데이터시트(PDF) 28 Page - NXP Semiconductors

PCF5083H/5V2/F3 데이터시트(HTML) 28 Page - NXP Semiconductors

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

데이터시트 다운로드

링크 URL