PCF8563 datasheet(13/30 Pages) PHILIPS

13 / 30 page

Philips Semiconductors

PCF8563

Real-time clock/calendar

Product speciﬁcation

16 April 1999

13 of 30

9397 750 04855

8.9 Serial interface

The serial interface of the PCF8563 is the I2C-bus. A detailed description of the

I2C-bus speciﬁcation, including applications, is given in the brochure:

The I2C-bus

and how to use it, order no. 9398 393 40011 or I2C Peripherals Data Handbook IC12.

8.9.1

Characteristics of the I2C-bus

The I2C-bus is for bidirectional, two-line communication between different ICs or

modules. The two lines are a serial data line (SDA) and a serial clock line (SCL). Both

lines must be connected to a positive supply via a pull-up resistor. Data transfer may

be initiated only when the bus is not busy.

The I2C-bus system conﬁguration is shown in Figure 6. A device generating a

message is a ‘transmitter’, a device receiving a message is the ‘receiver’. The device

that controls the message is the ‘master’ and the devices which are controlled by the

master are the ‘slaves’.

8.9.2

START and STOP conditions

Both data and clock lines remain HIGH when the bus is not busy. A HIGH-to-LOW

transition of the data line, while the clock is HIGH is deﬁned as the start condition (S).

A LOW-to-HIGH transition of the data line while the clock is HIGH is deﬁned as the

stop condition (P); see Figure 7.

Fig 5.

POR override sequence.

handbook, full pagewidth

MGM664

SCL

500 ns

2000 ns

SDA

8 ms

override active

power up

Fig 6.

I2C-bus system conﬁguration.

MBA605

MASTER

TRANSMITTER /

RECEIVER

SLAVE

RECEIVER

SLAVE

TRANSMITTER /

RECEIVER

MASTER

TRANSMITTER

MASTER

TRANSMITTER /

RECEIVER

SDA

SCL

Fig 7.

START and STOP conditions on the I2C-bus.

width

MBC622

SDA

SCL

STOP condition

SDA

SCL

START condition

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