| 전자부품 데이터시트 검색엔진 |
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AT34C02C 데이터시트(PDF) 13 Page - ATMEL Corporation |
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AT34C02C 데이터시트(HTML) 13 Page - ATMEL Corporation |
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13 / 20 page ![]() 13 AT34C02C [Preliminary] 5185A–SEEPR–9/06 does not respond with a zero but does generate a following stop condition (see Figure 14 on page 14). SEQUENTIAL READ: Sequential reads are initiated by either a current address read or a random address read. After the microcontroller receives a data word, it responds with an acknowledge. As long as the EEPROM receives an acknowledge, it will continue to increment the data word address and serially clock out sequential data words. When the memory address limit is reached, the data word address will “roll over” and the sequen- tial read will continue. The sequential read operation is terminated when the microcontroller does not respond with a zero but does generate a following stop condi- tion (see Figure 15 on page 14). PERMANENT WRITE PROTECT REGISTER (PSWP) STATUS: To find out if the regis- ter has been programmed, the same procedure is used as to program the register except that the R/W bit is set to 1. If the device sends an acknowledge, then the perma- nent write protect register has not been programmed. Otherwise, it has been programmed and the device is permanently write protected at the first half of the array. Table 10. PSWP Status REVERSIBLE WRITE PROTECT REGISTER(RSWP) STATUS: To find out if the regis- ter has been programmed, the same procedure is used as to program the register except that the R/W bit is set to 1. If the sends an device acknowledge, then the revers- ible write protect register has not been programmed. Otherwise, it has been programmed and the device is write protected (reversible) at the first half of the array. Figure 10. Device Address Figure 11. Byte Write Pin Preamble RW Command A2 A1 A0 B7 B6 B5 B4 B3 B2 B1 B0 Read PSWP A2A1 A0 0 1 1 0 A2 A1A0 1 |
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