TS80C51U2 datasheet(2/67 Pages) ATMEL

2 / 67 page

Rev. D - 15 January, 2001

TS80C51U2

TS83C51U2

TS87C51U2

configuration). UART_1 is fully compliant with the first one allowing an internal baud rate generator to be the

clock source. This common internal baud rate generator can be used independently by each UART or both as clock

source allowing to program various speeds.

The TS80C51U2 provides 7 sources of interrupt with four priority levels. UART_1 has a lower priority than Timer

2. The Serial Ports are full duplex meaning they can transmit and receive simultaneously. They are also receive

buffered, meaning they can start reception of a second byte before a previously received byte has been read from

the receive register. The Serial Port receive and transmit registers of UART_1 are both accessed at Special Function

receive register.

The UART_1 port control and status is the Special Function Register SCON_1. This register contains not only the

mode selection bit but also the 9th bit for transmit and receive (TB8_1 and RB8_1) and the serial port interrupt

bits (TI_1 and RI_1). The automatic address recognition feature is enabled when multiprocessor communication

is enabled. Implemented in hardware, automatic address recognition enhances the multiprocessor communication

feature by allowing the Serial Port to examine address of each incoming frame and provides filtering capability.

The UART_1 also comes with Frame error detection, similar to the UART_0.

TS80C51U2 데이터시트(PDF) 2 Page - ATMEL Corporation