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ACT88321 데이터시트(PDF) 53 Page - Qorvo, Inc |
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ACT88321 데이터시트(HTML) 53 Page - Qorvo, Inc |
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53 / 55 page ![]() ACT88321 Advanced PMIC with 3 Bucks, 2 LDOs, and Load Bypass Switches Datasheet Rev. D , June 17, 2022 | Subject to change without notice 53 of 55 www.qorvo.com ® SLEEP Mode SLEEP Mode can be enabled via I2C. DPSLP Mode DPSLP Mode can be enabled via I2C. DVS Mode DVS Mode is not enabled in CMI 112. Voltage Select Inputs CMI 112 uses GPIO2 as a voltage select input. Pulling GPIO2 high sets Buck3 = 1.5V. Pulling GPIO2 low sets Buck3 = 1.8V. GPIO2 (pin D2) – Buck3 Voltage Select GPIO2 is configured as an input to select the Buck3 output voltage. When GPIO2 is H, VSET1 sets Buck3 to 1.5V. When GPIO2 is L, VSET0 sets Buck3 to 1.8V. GPIO4 (pin C5) – EXT_PG GPIO4 is configured as an EXT_PG input. When GPIO4 goes high, Buck1 turns on with a 1ms delay, then all other outputs turn on with programmed sequencing. When GPIO4 goes low, the outputs turn off with their programmed 1ms delay times.LDO2 (VDDFUSE) has a 0ms turnoff delay. GPIO5 (pin D3) – nIRQ GPIO5 is a standard open drain nIRQ signal. GPIO7 (pin D1) – RESET GPIO7 is configured as an open drain, digital output. nRESET gated by Buck2 with a 20ms delay. I2C Address The CMI 112 7-bit I2C address is 0x25h. This results in 0x4Ah for a write address and 0x4Bh for a read address |
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