TSL2572 datasheet(22/41 Pages) OSRAM

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Datasheet, Public

Page 21

[v2-00] 2022-Nov-30

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TSL2572 − Register Overview

Enable Register (0x00)

The ENABLE register is used to power the device ON/OFF, enable

functions, and interrupts.

Figure 23:

Enable Register

Field

Bits

Description

Reserved

Reserved. Write as 0.

SAI

Sleep after interrupt. When asserted, the device will power down at the end of an ALS

cycle if an interrupt has been generated

Reserved

Reserved. Write as 0.

AIEN

ALS interrupt mask. When asserted, permits ALS interrupts to be generated.

WEN

Wait enable. This bit activates the wait feature. Writing a 1 activates the wait timer.

Writing a 0 disables the wait timer.

Reserved

Reserved. Write as 0.

AEN

ALS Enable. This bit actives the two channel ADC. Writing a 1 activates the ALS. Writing

a 0 disables the ALS.

PON

Power ON. This bit activates the internal oscillator to permit the timers and ADC

channels to operate. Writing a 1 activates the oscillator. Writing a 0 disables the

oscillator.

PON

ENABLE

Reserved

Resv

AIEN

Reset

0x00

AEN

WEN

SAI

Reserved

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