TSL25713FN datasheet(24/39 Pages) OSRAM

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[v1-01] 2018-Mar-27

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TSL2571 − Register Description

Persistence Register (0x0C)

The persistence register controls the filtering interrupt

capabilities of the device. Configurable filtering is provided to

allow interrupts to be generated after each ADC integration

cycle or if the ADC integration has produced a result that is

outside of the values specified by threshold register for some

specified amount of time. ALS interrupts are generated using

C0DATA.

Figure 26:

Persistence Register

Field

Bits

Description

Reserved

7:4

Reserved

APERS

3:0

Interrupt persistence. Controls rate of interrupt to the host processor.

FIELD VALUE

MEANING

INTERRUPT PERSISTENCE FUNCTION

0000

Every

Every ALS cycle generates an interrupt

0001

1 value outside of threshold range

0010

2 consecutive values out of range

0011

3 consecutive values out of range

0100

5 consecutive values out of range

0101

10 consecutive values out of range

0110

15 consecutive values out of range

0111

20 consecutive values out of range

1000

25 consecutive values out of range

1001

30 consecutive values out of range

1010

35 consecutive values out of range

1011

40 consecutive values out of range

1100

45 consecutive values out of range

1101

50 consecutive values out of range

1110

55 consecutive values out of range

1111

60 consecutive values out of range

APERS

PERS

Reserved

Address

0x0C

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