TSL2671 datasheet(26/45 Pages) OSRAM

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ams Datasheet

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[v1-00] 2016-Jul-12

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TSL2671 − Register Description

Wait Time Register (0x03)

Wait time is set 2.72 ms increments unless the WLONG bit is

asserted in which case the wait times are 12X longer. WTIME is

programmed as a 2’s complement number.

Figure 28:

Wait Time Register

Note(s):

1. The Wait Time Register should be configured before PEN is asserted.

Proximity Interrupt Threshold Registers (0x08 - 0x0B)

The proximity interrupt threshold registers provide the values

to be used as the high and low trigger points for the comparison

function for interrupt generation. If the value generated by

proximity channel crosses below the lower threshold specified,

or above the higher threshold, an interrupt is signaled to the

host processor.

Figure 29:

Proximity Interrupt Threshold Registers

Field

Bits

Description

Wait Time

Time (WLONG = 0)

Time (WLONG = 1)

WTIME

7:0

0xFF

2.72 ms

0.032 s

0xB6

201 ms

2.4 s

0x00

256

696 ms

8.3 s

Address

Bits

Description

PILTL

0x08

7:0

Proximity low threshold lower byte

PILTH

0x09

7:0

Proximity low threshold upper byte

PIHTL

0x0A

7:0

Proximity high threshold lower byte

PIHTH

0x0B

7:0

Proximity high threshold upper byte

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