AM67 datasheet(8/235 Pages) TI1

8 / 235 page

Table 4-1. Device Comparison (continued)

FEATURES(1)

REFERENCE

NAME

AM67A94

AM67A74

AM6754

AM6734

Flash Subsystem (FSS)(4)

OSPI0/QSPI0

Yes(4)

Gigabit Ethernet Interface

CPSW3G(5)

2 Ports (RGMII/RMII/SGMII(5))

General-Purpose Timers

TIMER

14 (4 in MCU and 2 in WKUP)

Enhanced Pulse-Width Modulator Module

EPWM

Enhanced Capture Module

ECAP

Enhanced Quadrature Encoder Pulse Module

EQEP

Universal Asynchronous Receiver and Transmitter

UART

PCI Express Gen3 Port with Integrated PHY

PCIe(5)

Single Lane

CSI2-RX Controller with DPHY

CSI-RX

4x4L

CSI2-TX Controller

CSI-TX

1x4L

USB2.0 Controller with PHY

USB 2.0

USB3.0 Controller with PHY

USB 3.1 Gen 1(5)

(1)

J722S is the base part number for the superset device. Software should constrain the features used to match the intended production

device.

(2)

Safety features including SIL/ASIL ratings are only applicable to select part number variants as indicated by the Device Type (Y)

identifier in the Device Naming Convention table.

(3)

Device security features including Secure Boot and Customer Programmable Keys are applicable to select part number variants as

indicated by the Device Type (Y) identifier in the Table 10-1, Nomenclature Description table

(4)

One flash interface, configured as OSPI0 or QSPI0.

(5)

PCIe, USB3.0 and SGMII share a total of 2 SERDES ports.

(6)

On the AM67A SoC, the Deep Learning Accelerator C7x + MMA are reserved for executing TI provided code, and are not available for

custom code.

AM67, AM67A

SPRSPA3 – MARCH 2024

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