MPC8313E datasheet(68/88 Pages) FREESCALE

68 / 88 page

MPC8313E PowerQUICC™ II Pro Processor Hardware Specifications, Rev. 0

Freescale Semiconductor

Package and Pin Listings

VDD

K11,K12,K13,K14,K15,K

16,L10,L17,M10,M17,

N10,N17,U12,U13,

T1,U2,V2,P5,U4

VDDC

F6,F10,F19,K6,K10,K17,

K21,P6,P10,P17,R10,

R17,T10,T17,U10,U11,

U14,U15,U16,U17,W6,

W21,AA6,AA10,AA14,

AA19

VSS

B1,B2,B8,B9,B16,B17,

C1,C2,C3,C4,C5,C24,

C25,C26,D3,D4,D12,

D13,D20,D21,F8,F11,

F13,F16,F17,F21,G2,

G25,H2,H6,H21,H25,

L4,L6,L11,L12,L13,L14,

L15,L16,L21,L23,M4,

M11,M12,M13,M14,

M15,M16,M23,N1,

N3,N6,N11,N12,N13,

N14,N15,N16,N21,N23,

P11,P12,P13,P14,P15,

P16,P23,P25,R11,R12,

R13,R14,R15,R16,R25,

T6,T11,T12,T13,T14,

T15,T16,T21,T25,U5,

U6,U21,W4,W23,Y4,

Y23,AA8,AA11,AA13,

AA16,AA17,AA21,AC4,

AC5,AC12,AC13,AC20,

AC21,AD1,AE2,AE8,

AE9,AE16,AE17,AF2,

P2, R2,T3,P3,V4

Notes:

1. This pin is an open drain signal. A weak pull-up resistor (1 k

Ω) should be placed on this pin to NVDD

2. This pin is an open drain signal. A weak pull-up resistor (2–10 k

Ω) should be placed on this pin to NVDD.

3. This output is actively driven during reset rather than being three-stated during reset.

4. These JTAG pins have weak internal pull-up P-FETs that are always enabled.

5. This pin should have a weak pull up if the chip is in PCI host mode. Follow PCI specifications recommendation.

6. This pin must always be tied to VSS.

Table 55. MPC8313E TEPBGAII Pinout Listing (continued)

Signal

Package Pin Number

Pin Type

Power

Supply

Notes

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