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PHT6N06LT 데이터시트(PDF) 6 Page - NXP Semiconductors |
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PHT6N06LT 데이터시트(HTML) 6 Page - NXP Semiconductors |
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6 / 9 page ![]() Philips Semiconductors Product specification TrenchMOS ™ transistor PHT6N06LT Logic level FET Fig.13. Typical turn-on gate-charge characteristics. V GS = f(QG); conditions: ID = 5 A; parameter VDS Fig.14. Typical reverse diode current. I F = f(VSDS); conditions: VGS = 0 V; parameter Tj Fig.15. Normalised avalanche energy rating. W DSS% = f(Tsp); conditions: ID = 1.9 A Fig.16. Avalanche energy test circuit. 01 234 5 0 1 2 3 4 5 6 VGS/V QG/nC VDS = 14V VDS = 44V 20 40 60 80 100 120 140 Tmb / C 120 110 100 90 80 70 60 50 40 30 20 10 0 WDSS% 0 0.2 0.4 0.6 0.8 1 1.2 1.4 0 2 4 6 8 10 IF/A VSDS/V Tj/C = 150 25 L T.U.T. VDD RGS R 01 VDS -ID/100 + - shunt VGS 0 W DSS = 0.5 ⋅ LID 2 ⋅ BV DSS/(BVDSS − VDD) January 1998 6 Rev 1.100 |
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