Philips Semiconductors Programmable Logic Devices

Product specification

PLS159A

Programmable logic sequencer

(16

× 45 × 12)

October 22, 1993

32

TIMING DIAGRAMS (Continued)

+3V

0V

+3V

0V

+3V

0V

VOH

VOL

tIS1*

tIS1

tCKO

tPRH

tPRO

1.5V

1.5V

1.5V

1.5V

1.5V

1.5V

(PRESET)

(RESET)

(PRESET)

(RESET)

I,B

(INPUTS)

CLK

PRESET/RESET

(I, B INPUTS)

Q

F

(OUTPUTS)

* Preset and Reset functions override Clock. However, F outputs may glitch with the first positive Clock Edge if tIS1

cannot be guaranteed by the user.

Asynchronous Preset/Reset

Flip-Flop Input Mode

I, B

(LOAD SELECT)

OE

L

F

(INPUTS)

CLK

Q

(DIN)

1.5V

1.5V

1.5V

1.5V

1.5V

VT

(FORCED DIN)

+3V

0V

+3V

0V

+3V

0V

+3V

0V

VOH

VOL

tOE1

tOD1

tIS2

tIH2

tCKH

tIH1