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ADC3910CSSS 데이터시트(PDF) 35 Page - Texas Instruments

부품명 ADC3910CSSS
상세설명  ADC3910Dx and ADC3910Sx 10-bit, 25 to 125MSPS Low Latency, Low Power, Small, Single and Dual Channel ADC with Integrated Input Buffers
PDF  131 Pages
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ADC3910CSSS 데이터시트(HTML) 35 Page - Texas Instruments

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6.3.5 Over-range (OVR)
The ALERT by default is configured to trigger when either ADC channel A or ADC channel B detects a signal
over-range on the input. The ALERT pin can also be configured via SPI write to register ALERT_PIN_SEL
(0x09C) to ignore one of the ADC channels or to trigger when a digital alert is detected, including if an
over-range is detected within a digital block. See the Digital Alert section to configure additional triggers in the
digital features.
ADC A
Output
Formatter
16/12/10/8-bit
Channel
Correction
ALERT
N
OVR CHB
ALERT DIG
OVR CHA
Figure 6-8. Over-range block diagram
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ADC3910D025, ADC3910D065, ADC3910D125
ADC3910S025, ADC3910S065, ADC3910S125
SBASAD1A – DECEMBER 2023 – REVISED MAY 2024
Copyright © 2024 Texas Instruments Incorporated
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Product Folder Links: ADC3910D025 ADC3910D065 ADC3910D125 ADC3910S025 ADC3910S065 ADC3910S125



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