Analog Integrated Circuit Device Data

Freescale Semiconductor

7

33285

FUNCTIONAL DESCRIPTION

INTRODUCTION

FUNCTIONAL DESCRIPTION

INTRODUCTION

The power FETs are turned ON by charging their gate

capacities with a current flowing out of pins OUT1 and OUT2.

During PWM, the values of table below are guaranteed. They

are measured with 8.0 nF on OUT1 and 16 nF on OUT2. Test

Figure 4. Turn On Behavior

The output voltages at OUT1 and OUT2 are limited by

flowing through the external or the internal zener diode.

When voltage power supply plus threshold voltage

Turn Off Characteristics

The power FETs on OUT1 and OUT2 are turned OFF by

discharging the gate capacity with the constant discharge

• Test conditions for switching OFF the power FETs:

1. IN open

2. Stages disabled via pin IN

3. Stage OUT1 disabled by an over current error

20 ms

2.5 V

5.0 V

IN

THRIN1

THRIN2

IN

0 V

0 V

2.5 V

IN

0

2.5 V

0 V

5.0 V

IN

0