Analog Integrated Circuit Device Data

Freescale Semiconductor

13

33689

ELECTRICAL CHARACTERISTICS

DYNAMIC ELECTRICAL CHARACTERISTICS

CURRENT SENSE OPERATIONAL AMPLIFIER

Supply Voltage Rejection Ratio (16)

SVR

60

—

—

dB

Common Mode Rejection Ratio (16)

CMR

70

—

—

dB

Gain Bandwidth (16)

GBP

1.0

—

—

MHz

Output Slew Rate

SR

0.5

—

—

V/

µs

Phase Margin

PHMO

40

—

—

deg.

Open Loop Gain (16)

OLG

—

85

—

dB

L1 AND L2 INPUT PINS

Wake-Up Filter Time (16)

8.0

20

38

µs

STATE MACHINE TIMING

Delay Between CS LOW-to-HIGH Transition (at End of SPI Stop Command)

and Stop Mode Activation (16)

Minimum Watchdog Period

No Watchdog Selected

Maximum Watchdog Period

1.4

6.0

12

—

—

—

5.0

30

50

µs

Interrupt Low-Level Duration

7.0

10

13

µs

Internal Oscillator Frequency Accuracy (All Modes, for Information Only)

-35

—

35

%

Normal Request Mode Time-Out (Normal Request Mode)

97

150

205

ms

Delay Between SPI Command and HS1 or HS2 Turn On (17)

, (18)

—

—

20

µs

Delay Between SPI Command and HS1 or HS2 Turn Off (17)

, (18)

—

—

20

µs

Delay Between SPI Command and HS3 Turn On (17)

, (19)

—

—

20

µs

Delay Between SPI Command and HS3 Turn Off (17)

, (19)

—

—

20

µs

Delay Between Normal Request and Normal Mode After a Watchdog Trigger

Command (Normal Request Mode) (16)

7.0

15

30

µs

Delay Between CS Wake-Up (CS LOW to HIGH) in Stop Mode and:

Normal Request Mode, VDD ON and RST HIGH

First Accepted SPI Command

15

90

40

—

80

N/A

µs

Delay Between Interrupt Pulse in Stop Mode After Wake-Up and First

Accepted SPI Command

30

—

N/A

µs

Minimum Time Between Rising and Falling Edge on the CS

15

—

—

µs

Notes

16.

Parameter guaranteed by design; however, it is not production tested.

17.

When IN input is set to HIGH, delay starts at falling edge of clock cycle #8 of the SPI command and start of device activation/deactivation.

30 mA load on high-side switches. Excluding rise or fall time due to external load.

18.

When IN is used to control the high-side switches, delays are measured between IN and HS1 or HS2 ON /OFF. 30 mA load on high-side

switches, excluding rise or fall time due to external load.

19.

Delay between turn on or turn off command and HS ON or HS OFF, excluding rise or fall time due to external load.

Table 4. Dynamic Electrical Characteristics (continued)

Characteristics noted under conditions 5.5 V

≤ V

Characteristic

Symbol

Min

Typ

Max

Unit