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SE2521A60-R 데이터시트(PDF) 1 Page - SiGe Semiconductor, Inc. |
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SE2521A60-R 데이터시트(HTML) 1 Page - SiGe Semiconductor, Inc. |
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1 / 16 page ![]() SE2521A60 RangeCharger™ 2.4 GHz Wireless LAN Front End 177-DST-01 Rev 1.4 Apr-04-2006 Confidential 1 of 16 QA040406 Applications IEEE802.11b DSSS WLAN IEEE802.11g OFDM WLAN Access Points, PCMCIA, PC cards Features Pin for pin compatible to SiGe’s SE2521A34 but providing 2 dB extra output power Dual Mode IEEE802.11b & IEEE802.11g All RF ports matched to 50 Ω Integrated PA, TX Filter, DPDT T/R and Diversity switches Integrated Power Detector 23 dBm O/P Power, 802.11b, 11 Mbits, ACPR <- 35 dBc 18 dBm @ 2.0 %, 802.11g, 54 Mbits Single supply voltage: 3.3 V ± 10 % Lead free and RoHS compliant Small lead free plated package, 8 mm x 7 mm x 1.1 mm, MSL 3 Ordering Information Part No. Package Remark SE2521A60 24 pin LGA Samples SE2521A60-R 24 pin LGA Tape and Reel SE2521A60-EK1 N/A Evaluation kit Product Description The SE2521A60 is a complete 802.11 b/g WLAN RF front-end module providing all the functionality of the power amplifier, power detector, T/R switch, diversity switch and associated matching. The SE2521A60 provides a complete 2.4 GHz WLAN RF solution from the output of the transceiver to the antennas in an ultra compact form factor. Designed for ease of use, all RF ports are matched to 50 Ω to simplify PCB layout and the interface to the transceiver RFIC. The SE2521A60 also includes a transmitter power detector with 20 dB of dynamic range and a digital enable control for transmitter power ramp on/off control. The power ramp rise/fall time is 1 µsec typical. The device also provides a notch filter from 3.2-3.3 GHz prior to the input of the power amplifier. The SE2521A60 is footprint compatible to SiGe’s SE2521A34 and can be placed directly into existing SE2521A34 designs easily providing higher output power solutions Functional Block Diagram Bias Circuitry Power Detector ANT_B C1 PD_OUT TX EN 50 Ohm Match RX OUT Switch Control C3 C2 C4 50 Ohm Match 50 Ohm Match 50 Ohm Match Filter TX IN ANT_A OMN LPF V CC1 Figure 1: Functional Block Diagram |
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