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MPC8280 데이터시트(PDF) 25 Page - Freescale Semiconductor, Inc |
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MPC8280 데이터시트(HTML) 25 Page - Freescale Semiconductor, Inc |
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25 / 80 page ![]() MPC8280 PowerQUICC II™ Family Hardware Specifications, Rev. 1.7 Freescale Semiconductor 25 Clock Configuration Modes In each clocking mode, the configuration of bus, core, PCI, and CPM frequencies is determined by seven bits during the power-up reset—three hardware configuration pins (MODCK[1–3]) and four bits from hardware configuration word[28–31] (MODCK_H). Both the PLLs and the dividers are set according to the selected MPC8280 clock operation mode as described in the following sections. 7.1 Local Bus Mode Table 16 lists clock configurations for the MPC8280 in local bus mode. The frequencies listed are for the purpose of illustration only. Users must select a mode and input bus frequency so that the resulting configuration does not exceed the frequency rating of the user’s device. NOTE Clock configurations change only after PORESET is asserted. Table 16. Clock Configurations for Local Bus Mode 1 Mode 2 Bus Clock 3 (MHz) CPM Multiplication Factor 4 CPM Clock (MHz) CPU Multiplication Factor 5 CPU Clock (MHz) MODCK_H-MODCK[1-3] Low High Low High Low High Default Modes (MODCK_H= 0000) 0000_000 37.5 133.3 3 112.5 400.0 4 150.0 533.3 0000_001 33.3 133.3 3 100.0 400.0 5 166.7 666.7 0000_010 37.5 100.0 4 150.0 400.0 4 150.0 400.0 0000_011 30.0 100.0 4 120.0 400.0 5 150.0 500.0 0000_100 60.0 167.0 2 120.0 334.0 2.5 150.0 417.5 0000_101 50.0 167.0 2 100.0 334.0 3 150.0 501.0 0000_110 60.0 160.0 2.5 150.0 400.0 2.5 150.0 400.0 0000_111 50.0 160.0 2.5 125.0 400.0 3 150.0 480.0 Full Configuration Modes 0001_000 50.0 167.0 2 100.0 334.0 4 200.0 668.0 0001_001 50.0 167.0 2 100.0 334.0 5 250.0 835.0 0001_010 50.0 145.8 2 100.0 291.7 6 300.0 875.0 0001_011 Reserved 0001_100 Reserved 0001_101 37.5 133.3 3 112.5 400.0 4 150.0 533.3 0001_110 33.3 133.3 3 100.0 400.0 5 166.7 666.7 1000_111 33.3 133.3 3 100.0 400.0 5.5 183.3 733.3 0001_111 33.3 133.3 3 100.0 400.0 6 200.0 800.0 0010_000 Reserved 0010_001 Reserved |
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