Analog Integrated Circuit Device Data

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Freescale Semiconductor

21

34844

FUNCTIONAL DEVICE OPERATION

I2C BUS SPECIFICATION

I2C BUS SPECIFICATION

The 34844 is a unidirectional device that can only be written by an external control unit. Since the device is a 7 bit address device

(1110110), the control unit needs to follow a specific data transfer format which is shown in Table 6.

Figure 6. A Complete Data Transfer

For a complete data transfer, use this format in the following order:

1. START condition

2. 34844 device address and Write instruction (R/W = 0)

3. First data pack, it corresponds to the 34844 register needing to be written. (refer to Table 6)

4. Second data pack, it corresponds to the value which should be written to that register. (refer to Table 6)

5. STOP condition

I2C variables description:

• START: this condition occurs when SDA changes from HIGH to LOW while SCK is HIGH.

• ACKNOWLEDGE: The acknowledge clock pulse is generated by the Master (Control Unit).

• The transmitter releases the SDA line (HIGH) during the acknowledge clock pulse.The receiver (34844) must pull down the SDA line

during this acknowledge pulse to indicate that the data was correctly written.

• Bits in the first byte: The first seven bits of the first bite make up the slave address. The eighth bit is the LSB (least significant bit), which

determines the direction of the message (Write = 0)

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For the 34844 device, when an address is sent, each of the devices in a system compares the first seven bits after the START condition

with its address. If they match, the device considers itself addressed by the control unit as a slave-receiver.

• STOP: this condition occurs when SDA changes from LOW to HIGH while SCK is HIGH