XRT86VL32IB datasheet(49/153 Pages) EXAR

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XRT86VL3X

REV. 1.2.2

T1/E1/J1 FRAMER/LIU COMBO - ARCHITECTURE DESCRIPTION

4.4.2

Configure the E1 Transmit Overhead Input Interface module as source of the National Bit

Sequence in E1 framing format mode

The National Bit Sequence in E1 framing format mode can be inserted from:

• E1 Transmit Overhead Input Interface Block

• E1 Transmit HDLC Controller

• E1 Transmit Serial Input Interface

The purpose of the Transmit Overhead Input Interface is to permit Data Link equipment direct access to the

Sa4 through Sa8 National bits that are to be transported via the outbound frames. The Transmit Data Link

Source Select [1:0] bits, within the Synchronization MUX Register (SMR) determine source of the Sa4 through

Sa8 National bits to be inserted into the outgoing E1 frames.

The table below shows configuration of the Transmit Data Link Source Select [1:0] bits of the Synchronization

MUX Register (SMR).

If the Transmit Data Link Source Select bits of the Transmit Data Link Select Register are set to 10, the

Transmit Overhead Input Interface Block becomes input source of the FDL bits.

The XRT86VL3x allows the user to decide on the following:

• How many of the National Bits will be used to carry the Data Link information bits

• Which of these National Bits will be used to carry the Data Link information bits.

The Transmit Sa Data Link Select bits of the Transmit Signaling and Data Link Select Register (TSDLSR)

determine which ones of the National bits are configured as Data Link bits in E1 framing format mode.

Depending upon the configuration of the Transmit Signaling and Data Link Select Register, either of the

following cases may exists:

• None of the National bits are used to transport the Data Link information bits (That is, data link channel of

XRT86VL3x is inactive).

FIGURE 42. BLOCK DIAGRAM OF THE E1 TRANSMIT OVERHEAD INPUT INTERFACE OF XRT86VL3X

SYNCHRONIZATION MUX REGISTER (SMR) (ADDRESS = 0XN109H)

BIT

NUMBER

BIT NAME

BIT TYPE

BIT DESCRIPTION

3-2

Transmit Data Link

Source Select [1:0]

R/W

00 - The Sa4 through Sa8 National bits are inserted into the framer

through the Transmit Serial Data input Interface via the TxSer_n pins.

01 - The Sa4 through Sa8 National bits are inserted into the framer

through the Transmit LAPD Controller.

10 - The Sa4 through Sa8 National bits are inserted into the framer

through the Transmit Overhead Input Interface via the TxOH_n pins.

11 - The Sa4 through Sa8 National bits are inserted into the framer through

the Transmit Serial Data input Interface via the TxSer_n pins.

Transmit

Overhead Input

Interface

TxOH_n

TxOHClk_n

To Transmit

Framer Block

XRT86VL32IB 데이터시트(PDF) 49 Page - Exar Corporation

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