XRT86VL32IB datasheet(21/174 Pages) EXAR

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XRT86VL32

REV. V1.2.0

DUAL T1/E1/J1 FRAMER/LIU COMBO - E1 REGISTER DESCRIPTION

FAS Frame Align

Sel

R/W

FAS Alignment Declaration Algorithm Select

This bit specifies which algorithm the Receive E1 Framer block uses in its

search for the FAS Alignment.

0 = Selects the FAS Alignment Algorithm 1

1 = Selects the FAS Alignment Algorithm 2

FAS Alignment Algorithm 1

If the Receive E1 Framer block has been configured to use “FAS Alignment

Algorithm # 1", then it will acquire FAS alignment by performing the follow-

ing three steps:

Step 1 - The Receive E1 Framer block begins by searching for the correct

7-bit FAS pattern. Go to Step 2 if found.

Step 2 - Check if the FAS is absent in the following frame by verifying that

bit 2 of the assumed timeslot 0 of the Non-FAS frame is a one. Go back to

Step 1 if failed, otherwise, go to step 3.

Step 3 - Check if the FAS is present in the assumed timeslot 0 of the third

frame. Go back to Step 1 if failed.

After the first three steps (if they all passed), the Receive E1 Framer Block

will declare FAS in SYNC if Frame Check Sequence (Bit 1 of this register) is

disabled. If Frame Check Sequence (Bit 1 of this register) is enabled, then

the Receive E1 Framer Block will need to verify the correct frame alignment

for an additional two frames.

FAS Alignment Algorithm 2

If the Receive E1 Framer block has been configured to support “FAS Align-

ment Algorithm # 2, then it will perform the following 3 steps in order to

acquire and declare FAS Frame Alignment with the incoming E1 data-

stream. Algorithm 2 is similar to Algorithm 1 but adds a one-frame hold off

time after the second step fails. After the second step fails, it waits for the

next assumed FAS in the next frame before it begins the new search for the

correct FAS pattern.

Step 1 - Algorithm 1 begins by searching for the correct 7-bit FAS pattern.

Go to Step 2 if found.

Step 2 - Check if the FAS is absent in the following frame by verifying that

bit 2 of the assumed timeslot 0 of the Non-FAS frame is a one. Go back to

Step 4 if failed, otherwise, go to step 3.

Step 3 - Check if the FAS is present in the assumed timeslot 0 of the third

frame. Go back to Step 1 if failed, otherwise, proceed to check for Frame

Check Sequence.

Step 4 - Wait for assumed FAS in the next frame, then go back to Step 1

After the first three steps (if they all passed), the Receive E1 Framer Block

will declare FAS in SYNC if Frame Check Sequence (Bit 1 of this register) is

disabled. If Frame Check Sequence (Bit 1 of this register) is enabled, then

the Receive E1 Framer Block will need to verify the correct frame alignment

for an additional two frames.

TABLE 4: FRAMING SELECT REGISTER (FSR)

HEX ADDRESS: 0Xn107

BIT

FUNCTION

TYPE

DEFAULT

DESCRIPTION-OPERATION

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