Nov20-06 Rev M

SP6330/32/34 Quad Power Supervisory Circuit Family

© Copyright 2006 Sipex Corporation

9

0

100

200

300

400

500

85 80 70 60 50 40 30 20 10

0 -10 -20 -30 -40

D e g C

Reset Timeout vs. Temperature

ResetTimeout Delay Vs. Temperature

R S T B v s . V 1 (V 2 = G N D )

0

0.5

1

1.5

2

2.5

3

3.

5

4

4.5

5

0

0.5

1

1.5

2

2.5

3

3.5

4

4.5

5

V1 (Vdc)

Reset Good

APPLICATION INFORMATION

(400ms Reset)