2-4
RF5198
Rev A5 060310
Pin
Function
Description
Interface Schematic
1RF IN
RF input internally matched to 50
Ω. This input is internally AC-coupled.
2GND
Ground connection.
3VMODE
For nominal operation (High Power mode), VMODE is set LOW. When
set HIGH, devices are biased lower to improve efficiency at lower out-
put levels.
4VREG
Regulated voltage supply for amplifier bias circuit. In power down
mode, both VREG and VMODE need to be LOW (<0.5V).
5VDET
An external load resistor (RDET) is required on this pin. A lowpass filter
or averaging functionality is also required to reduce voltage ripple (due
to modulation) to an acceptable amount. An isolator is required on the
PA RF output for proper operation of PDET when the PA operates into a
non-50
Ω load impedance.
6NC
No connection. Do not connect this pin to any external circuit.
7NC
No connection. Do not connect this pin to any external circuit.
8NC
No connection. Do not connect this pin to any external circuit.
9RF OUT
RF output. Internally AC-coupled.
10
VCC2
Output stage collector supply. Please see the schematic for required
external components.
11
VCC2
Same as pin 10.
12
VCC2
Same as pin 10.
13
NC
No connection. Do not connect this pin to any external circuit.
14
IM
Interstage matching. Connect to pin 15.
15
VCC1/IM
First stage collector supply and interstage matching.
16
VCCBIAS
Power supply input for the DC bias circuitry.
Pkg
Base
GND
Ground connection. The backside of the package should be soldered to
a top side ground pad which is connected to the ground plane with mul-
tiple vias. The pad should have a short thermal path to the ground
plane.
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