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SST26VF032B 데이터시트(PDF) 31 Page - Microchip Technology

부품명 SST26VF032B
상세설명  2.5V/3.0V 32-Mbit Serial Quad I/O™ (SQI™) Flash Memory
PDF  82 Pages
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제조업체  MICROCHIP [Microchip Technology]
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 2013-2022 Microchip Technology Inc. and its subsidiaries
DS20005218K-page 31
SST26VF032B/SST26VF032BA
5.28
Lockout Security ID
The Lockout Security ID instruction prevents any future
changes to the Security ID, and is supported in both
SPI and SQI modes. Prior to the operation, execute
WREN.
To execute a Lockout SID, the host drives CE# low,
sends the Lockout Security ID command cycle (85H),
then drives CE# high. Poll the BUSY bit in the software
STATUS register, or wait TPSID, for the completion of
the Lockout Security ID operation.
5.29
Read STATUS Register (RDSR) and
Read Configuration Register
(RDCR)
The Read STATUS Register (RDSR) and Read Config-
uration Register (RDCR) commands output the contents
of the STATUS and Configuration registers. These
commands function in both SPI and SQI modes. The
STATUS register may be read at any time, even during
a write operation. When a write is in progress, poll the
BUSY bit before sending any new commands to assure
that the new commands are properly received by the
device.
To read the STATUS or Configuration registers, the
host drives CE# low, then sends the Read STATUS
Register command cycle (05H) or the Read Configura-
tion Register command (35H). A dummy cycle is
required in SQI mode. Immediately after the command
cycle, the device outputs data on the falling edge of the
SCK signal. The data output stream continues until ter-
minated by a low-to-high transition on CE#. See
Figure 5-28 and Figure 5-29 for the instruction
sequence.
FIGURE 5-28:
READ STATUS REGISTER AND READ CONFIGURATION REGISTER SEQUENCE
(SQI)
FIGURE 5-29:
READ STATUS REGISTER AND READ CONFIGURATION REGISTER SEQUENCE
(SPI)
Note:
MSN = Most Significant Nibble; LSN = Least Significant Nibble, C[1:0]=05H or 35H
MODE 3
0
SCK
SIO[3:0]
CE#
C1 C0
MODE 0
2
XX
MSN LSN
4
H0 L0
6
H1 L1
8N
HN LN
Dummy
Data Byte
Data Byte
Data Byte
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
MODE 3
SCK
SI
SO
CE#
Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
05 or 35
MODE 0
High-Impedance
STATUS or Configuration
Register Out
MSb
MSB



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