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PL560-08OCLR 데이터시트(PDF) 6 Page - PhaseLink Corporation

부품명 PL560-08OCLR
상세설명  Analog Frequency Multiplier
PDF  15 Pages
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제조업체  PLL [PhaseLink Corporation]
홈페이지  http://www.phaselink.com
Logo PLL - PhaseLink Corporation

PL560-08OCLR 데이터시트(HTML) 6 Page - PhaseLink Corporation

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Analog Frequency Multiplier
PL560-xx VCXO Family
47745 Fremont Blvd., Fremont, CA 94538 TEL (510) 492-0990, FAX (510) 492-0991
www.phaselink.com
Rev.:02-09-07 Page 6
Figure 5: Diagram Representation of the Related System Inductance and Capacitance
DIE SIDE
PCB side
- Cinternal = Based on AFM device
- LWB1 = 2 nH, (2 places), Stray inductance
- Cpad = 2.0 pF, Bond pad and its ESD circuitry
- Cstray = 1.0 pF, Stray capacitance
- C11 = 0.4 pF, The following amplifier stage
- L2X (L4X) = 2x or 4x inductor
- C2X (C4X) = range (0.1 to 2.7 pF), Fine tune
inductor if used
• There are two default variables that normally will not need to be modified. These are Cpad, and C11 and
are found in cells B22 and B27 of ‘AFM Tuning Assistant’, respectively.
• LWB1 is the combined stray inductance in the layout. The DIE wire bond is ~ 0.6 nH and in the case of a
leaded part an additional 1.0 nH is added. Your layout inductance must be added to these. There are 2 of
these and they are assumed to be approximately symmetrical so you only need to enter this inductance
once in cell B23.
• Enter the stray parasitic capacitance into cell B26. An additional 0.5 pF must be added to this value if a
leaded part is used.
• Enter the appropriate value for Cinternal into B21 based on the device used (see column D). Use the ‘AFM
Tuning Assistant’ software to calculate L2X (and C2X if used) for your resonance frequency.
• For 4X AFMs, repeat the same procedure in the L4X worksheet.
• See the examples in the following section.



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