24C04A

DS11183F-page 8

 2004 Microchip Technology Inc.

FIGURE 9-1:

CURRENT ADDRESS READ

FIGURE 9-2:

RANDOM READ

FIGURE 9-3:

SEQUENTIAL READ

SP

BUS ACTIVITY

MASTER

SDA LINE

BUS ACTIVITY

S

T

A

R

T

S

T

O

P

CONTROL

BYTE

DATA n

A

C

K

N

O

A

C

K

S

P

S

BUS ACTIVITY

MASTER

SDA LINE

BUS ACTIVITY

S

T

A

R

T

S

T

O

P

CONTROL

BYTE

A

C

K

WORD

ADDRESS (n)

CONTROL

BYTE

S

T

A

R

T

DATA (n)

A

C

K

A

C

K

N

O

A

C

K

P

BUS ACTIVITY

MASTER

SDA LINE

BUS ACTIVITY

S

T

O

P

CONTROL

BYTE

A

C

K

N

O

A

C

K

DATA n

DATA n + 1

DATA n + 2

DATA n + X

A

C

K

A

C

K

A

C

K

9.0

READ MODE

In this mode the 24C04A transmits data to the master

devide.

As can be seen from Figure 9-2 and Figure 9-3, the

master first sets up the slave and word addresses by

doing a write. (Note: Although this is a read mode, the

address pointer must be written to). During this period

the 24C04A generates the necessary acknowledge bits

as defined in the appropriate section.

The master now generates another START condition

and transmits the slave address again, except this time

the read/write bit is set into the read mode. After the

slave generates the acknowledge bit, it then outputs

the data from the addressed location on to the SDA pin,

increments the address pointer and, if it receives an

acknowledge from the master, will transmit the next

consecutive byte. This auto-increment sequence is

only aborted when the master sends a STOP condition

instead of an acknowledge.

Note 1: If the master knows where the address

pointer is, it can begin the read sequence

at the current address (Figure 9-1) and

save time transmitting the slave and word

addresses.

Note 2: In all modes, the address pointer will not

increment through a block (256 byte)

boundary, but will rotate back to the first

location in that block.