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POWR6AT6 데이터시트(PDF) 13 Page - Lattice Semiconductor |
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POWR6AT6 데이터시트(HTML) 13 Page - Lattice Semiconductor |
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13 / 34 page ![]() Lattice Semiconductor ispPAC-POWR6AT6 Data Sheet 13 Figure 8 shows the resistor network between the TrimCell #N in the ispPAC-POWR6AT6 and the DC-DC converter. The values of these resistors depend on the type of DC-DC converter used and its operating voltage range. The method to calculate the values of the resistors R1, R2, and R3 are described in a separate application note. Voltage Profile Control The Margin / Trim Block of ispPAC-POWR6AT6 consists of six TrimCells. Because all six TrimCells in the Margin / Trim Block are controlled by a common voltage profile control signals, they all operate at the same voltage profile. The voltage profile control input comes from a pair of device pins: VPS0, VPS1. TrimCell Architecture The TrimCell block diagram is shown in Figure 9. The 8-bit DAC at the output provides the trimming voltage required to set the output voltage of a programmable supply. Each TrimCell can be operated in any one of the four voltage profiles. In each voltage profile the output trimming voltage can be set to a preset value. There are six 8-bit registers in each TrimCell that, depending on the operational mode, set the DAC value. Of these, four DAC values (DAC Register 0 to DAC Register 3) are stored in the E 2CMOS memory while the remaining register contents are stored in volatile registers. Two multiplexers (Mode Mux and Profile Mux) control the routing of the code to the DAC. The Profile Mux can be controlled by common TrimCell voltage profile control signals. Figure 9. ispPAC-POWR6AT6 Output TrimCell Figure 7 shows four power supply voltages next to each DC-DC converter. When the Profile MUX is set to Voltage Profile 3, the DC supply controlled by Trim 1 will be at 0.95V, the DC supply controlled by Trim 2 will be at 1.14V, 1.42V for Trim 3 and 3.13V for Trim 8. When Voltage Profile 0 is selected, Trim 1 will set the supply to 1V, Trim 2 and Trim 3 will be set by the values that have been loaded using I 2C at 1.2 and 1.5V, and Trim 6 will be set to 3.3V. The following table summarizes the voltage profile selection and the corresponding DAC output trimming voltage. The voltage profile selection is common to all six TrimCells. DAC REGISTER 0 (E2CMOS) CLOSED LOOP TRIM REGISTER DAC REGISTER 3 (E2CMOS) VOLTAGE PROFILE 0 MODE SELECT (E2CMOS) DAC 00 01 10 11 TRIMx 2 8 8 8 8 8 8 8 DAC REGISTER (I 2C) 8 VOLTAGE PROFILE 3 VOLTAGE PROFILE 2 VOLTAGE PROFILE 1 VOLTAGE PROFILE 0 DAC REGISTER 2 (E2CMOS) DAC REGISTER 1 (E2CMOS) FROM CLOSED LOOP TRIM CIRCUIT TRIMCELL ARCHITECTURE COMMON TrimCell VOLTAGE PROFILE CONTROL |
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