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M41T00SC64 데이터시트(PDF) 14 Page - STMicroelectronics |
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M41T00SC64 데이터시트(HTML) 14 Page - STMicroelectronics |
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14 / 19 page ![]() DC and AC parameters M41T00SC64 14/19 Table 8. AC characteristics (serial EEPROM, M24C64) Symbol Alt. Parameter Test condition Min. Max. Unit fC fSCL Clock frequency 400 kHz tCHCL tHIGH Clock pulse width high 600 ns tCLCH tLOW Clock pulse width low 1300 ns tDL1DL2 (1) 1. Sampled only, not 100% tested. tF SDA fall time 20 300 ns tDXCX tSU:DAT Data in set up time 100 ns tCLDX tHD:DAT Data in hold time 0 ns tCLQX tDH Data out hold time 200 ns tCLQV (2) 2. To avoid spurious START and STOP conditions, a minimum delay is placed between SCL=1 and the falling or rising edge of SDA tAA Clock low to next data valid (access time) 200 900 ns tCHDX (3) 3. For a reSTART condition, or following a Write cycle. tSU:STA Start condition set up time 600 ns tDLCL tHD:STA Start condition hold time 600 ns tCHDH tSU:STO Stop condition set up time 600 ns tDHDL tBUF Time between stop condition and next start condition 1300 ns tW tWR Write time 5 ms tNS Pulse width ignored (input filter on SCL and SDA for serial EEPROM) Single glitch 200 ns |
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