5.3

Register map

The register space provides 8 control registers. The mapping of registers is shown in Table 9, with a detailed of

registers 0 (REG_MODE) and 1 (REG_CTRL) shown in Table 10 and Table 11. All registers are reset to default

values at power-on or reset, and the PORDET bit in register REG_CTRL is used to indicate the occurrence of a

power-on-reset.

Table 9. Register map

Control Register name

Type

Address (decimal)

Description

REG_MODE

R/W

0

Mode register

REG_CTRL

R/W

1

Control and status register

REG_CURRENT_LOW

R

6

Load current value, bits 0-7

REG_CURRENT_HIGH

R

7

Load current value, bits 8-15

REG_VOLTAGE_LOW

R

8

Power supply voltage value, bits 0-7

REG_VOLTAGE_HIGH

R

9

Power supply voltage value, bits 8-15

REG_TEMPERATURE_LOW

R

10

Temperature value, bits 0-7

REG_TEMPERATURE_HIGH

R

11

Temperature value, bits 8-15

Values held in consecutive registers (such as the current value in the REG_CURRENT_LOW and

REG_CURRENT_HIGH registers) must be read with a single I²C access to ensure data integrity. It is possible to

read multiple values in one I²C access, all values are consistent.

The load current is coded in 2’s complement format, and the LSB value is 11.77 µV.

The power supply voltage is coded in binary format, and the LSB value is 2.44 mV.

The temperature value is coded in 2’s complement format, and the LSB value is 0.125 °C.

The temperature of 0 °C corresponds to code 0

Table 10. REG_MODE – address 0

Bit name

Pos.

Type

Def.

Description

[3..0]

0

Unused bits.

DEVICE_ON

4

0

0: standby mode. The TSC1214 is in low power mode

and conversion is not operating. When the TSC1214

is powered on, by default it is set to standby mode.

1: operating mode. To start conversion, the

DEVICE_ON bit must be set to 1.

[7..5]

0

Unused bits.

Table 11. REG_CONTROL – address 1

Bit name

Pos.

Type

Def.

Description

[3..0]

0

Unused bits.

POR_DETECT

4

R

1

Power on reset (POR) detection bit:

0 = no POR event occurred,

1 = POR event occurred.

W

0

Soft reset:

0 = release the soft-reset and clear the POR

detection bit, 1 = assert the soft-reset and set

the

POR detection bit.

[7..5]

Unused bits.

TSC1214

Application information

DS14731 - Rev 1

page 9/18