DS2502PSLASHT datasheet(22/22 Pages) DALLAS

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DS2502

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NOTES:

1. All voltages are referenced to ground.

2. VPUP = external pullup voltage.

3. Input load is to ground.

4. An additional reset or communication sequence cannot begin until the reset high time has expired.

5. Read data setup time refers to the time the host must pull the 1-Wire bus low to read a bit. Data is

guaranteed to be valid within 1

μs of this falling edge and will remain valid for 14 µs minimum. (15

µs total from falling edge on 1-Wire bus.)

6. VIH is a function of the external pullup resistor and the pull-up voltage.

7. 30 nanocoulombs per 72 time slots @ 5.0V.

8. At VCC=5.0V with a 5 kΩ pullup to VCC and a maximum time slot of 120 µs.

9. Capacitance on the data pin could be 800 pF when power is first applied. If a 5 k

Ω resistor is used to

pullup the data line to VCC, 5 µs after power has been applied the parasite capacitance will not affect

normal communications.

10. Maximum 1-Wire voltage for programming parameters is 11.5V to 12.0V; temperature range is -40°C

to +50°C.

11. Under certain low-voltage conditions VILMAX may have to be reduced to as much as 0.5V to always

guarantee a presence pulse.

12. The accumulative duration of the programming pulses for each address must not exceed 5 ms.

DS2502P/T 데이터시트(PDF) 22 Page - Dallas Semiconductor