전자부품 데이터시트 검색엔진
  Korean  ▼
ALLDATASHEET.CO.KR

X  

TDA8772H/3 데이터시트(PDF) 8 Page - NXP Semiconductors

부품명 TDA8772H/3
상세설명  Triple 8-bit video digital-to-analog converter
PDF  20 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
제조업체  PHILIPS [NXP Semiconductors]
홈페이지  http://www.nxp.com
Logo PHILIPS - NXP Semiconductors

TDA8772H/3 데이터시트(HTML) 8 Page - NXP Semiconductors

Back Button TDA8772H/3 Datasheet HTML 4Page - NXP Semiconductors TDA8772H/3 Datasheet HTML 5Page - NXP Semiconductors TDA8772H/3 Datasheet HTML 6Page - NXP Semiconductors TDA8772H/3 Datasheet HTML 7Page - NXP Semiconductors TDA8772H/3 Datasheet HTML 8Page - NXP Semiconductors TDA8772H/3 Datasheet HTML 9Page - NXP Semiconductors TDA8772H/3 Datasheet HTML 10Page - NXP Semiconductors TDA8772H/3 Datasheet HTML 11Page - NXP Semiconductors TDA8772H/3 Datasheet HTML 12Page - NXP Semiconductors Next Button
Zoom Inzoom in Zoom Outzoom out
 8 / 20 page
background image
1997 Mar 06
8
Philips Semiconductors
Product specification
Triple 8-bit video digital-to-analog
converter
TDA8772
Notes
1. Minimum and maximum data of current and power consumption are measured in worse case conditions: for
minimum data, all digital inputs are at logic level 0 while for maximum data, all digital inputs are at logic level 1.
2. VOUT is directly proportional to Vref.
Voltage reference (pin 34, referenced to VSSA)
Vref
output reference voltage
1.180
1.242
1.305
V
Outputs
OUTB, OUTR, OUTG ANALOG OUTPUTS (PINS 36, 44 AND 40, REFERENCED TO VSSA)RL =75 Ω; SEE TABLES 1 AND 2
FSR
full-scale output voltage range
0.9
1.0
1.1
V
Vos
offset of analog voltage output
0.75
0.83
0.95
V
VOUTmax
maximum output voltage
data inputs = logic 1;
note 2
1.65
1.83
2.05
V
VOUTmin
minimum output voltage
data inputs = logic 0;
note 2
0.75
0.83
0.95
V
THD
total harmonic distortion
fi = 4.43 MHz;
fclk =35MHz
−−45
−
dB
fi = 4.43 MHz;
fclk =85MHz
−−43
−
dB
ZL
output load impedance
60
75
90
Ω
Transfer function
INL
integral non-linearity
fclk = 35 MHz; ramp input −±0.5
±1
LSB
fclk = 85 MHz; ramp input −±0.75
±1.2
LSB
DNL
differential non-linearity
fclk = 35 MHz; ramp input −±0.25
±0.5
LSB
fclk = 85 MHz; ramp input -
±0.5
±0.75
LSB
αCT
crosstalk DAC to DAC
−45
−−
dB
m
DAC to DAC matching
−
1.0
2.0
%
Switching characteristics (RL =75 Ω); see Fig.4
td
input to 50% output delay time
full-scale change
−
10
−
ns
ts1
settling time
10% to 90% full-scale
change
−
6
−
ns
ts2
settling time
to
±1 LSB
−
30
−
ns
Output transients (glitches)
Vg
area for 1 LSB change
−
1
−
LSB.ns
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20


데이터시트 다운로드

Go To PDF Page


링크 URL



ALLDATASHEET 가 귀하에 도움이 되셨나요?  [ DONATE ] 

Alldatasheet는?   |   광고문의   |   운영자에게 연락하기   |   개인정보취급방침   |   링크 투 데이터시트    |   링크교환   |   제조사별 검색
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com