TLH9414 – 21

FIGURE 1 Simplified Settling Time Test Circuit (see Text)

tling time testing must be able to drive 50

X with a very clean

tling time see Application Note AN-428

Output Compensation

When operating at very low temperatures a compensation

network should be added to the LF400’s output The 100

X

22 pF network shown on the first page of this data sheet

should be used when the junction temperature might reach

25 C (roughly 0 C ambient when the LF400 is ‘‘warmed

up’’) In applications where the device will be operating with

a junction temperature near 0 C the output RLC network in

(about 20 ns) improvement in settling time at higher temper-

atures as well

Supply Bypassing

Power supply bypassing is extremely important for good

high-speed performance Ideally multiple bypass capacitors

as in

mF tantalum a 22 mF

ceramic and a 047

mF ceramic work well All bypass ca-

pacitor leads should be very short For best results the

ground leads of the capacitors should be separated to re-

duce the inductance to ground A ground plane layout ap-

proach will give the best results For simplicity bypass ca-

pacitors have been omitted from some of the schematics in

this data sheet but they should always be used

TLH9414 – 22

FIGURE 2 Power Supply Bypassing (see Text)

Output Drive and Current Limit

The LF400 can drive heavier resistive loads than most oper-

ational amplifiers The output at pin 6 is internally current-

limited when the voltage drop across the 25

X output resis-

put current is needed pin 8 provides a means of increasing

the maximum output current up to about 100 mA A resistor

may be connected from pin 8 to pin 6 paralleling the inter-

nal sense resistor and increasing the current limit threshold

(

pletely bypass the current limiting circuit To avoid damaging

the LF400 observe the power dissipation limitations men-

tioned in the Absolute Maximum Ratings and in Note 4

The effective load impedance (including feedback resist-

ance) should be kept above 500

X for fastest settling Load

capacitance should also be minimized if good settling time

is to be optimized Large feedback resistors will make the

circuit more susceptible to stray capacitance so in high-

speed applications keep the feedback resistors in the 1 k

X

to2k

X range wherever practical Avoid the use of inductive

feedback resistors (some wirewounds for example) as these

will degrade settling time

055V

TLH9414 – 23

FIGURE 3 Increasing the current limit using pin 8

the internal 25

X sense resistor

Offset voltage can be nulled using a 27k resistor and a 10k

potentiometer connected to pins 1 and 5 as shown in

Figure

help to avoid noise pickup When not used for offset adjust-

ment pins 1 and 5 can often be left open but to minimize

should be connected to ground or V

b

10