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PIC18F44J10-E/SP 데이터시트(PDF) 18 Page - Microchip Technology |
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PIC18F44J10-E/SP 데이터시트(HTML) 18 Page - Microchip Technology |
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18 / 358 page ![]() PIC18F45J10 FAMILY DS39682C-page 16 Preliminary © 2007 Microchip Technology Inc. TABLE 1-3: PIC18F44J10/45J10 PINOUT I/O DESCRIPTIONS Pin Name Pin Number Pin Type Buffer Type Description PDIP QFN TQFP MCLR MCLR 118 18 IST Master Clear (input) or programming voltage (input). Master Clear (Reset) input. This pin is an active-low Reset to the device. OSC1/CLKI OSC1 CLKI 13 32 30 I I — CMOS Oscillator crystal or external clock input. Oscillator crystal input or external clock source input. External clock source input. Always associated with pin function OSC1. See related OSC2/CLKO pins. OSC2/CLKO OSC2 CLKO 14 33 31 O O — — Oscillator crystal or clock output. Oscillator crystal output. Connects to crystal or resonator in Crystal Oscillator mode. In RC mode, OSC2 pin outputs CLKO which has 1/4 the frequency of OSC1 and denotes the instruction cycle rate. Legend: TTL = TTL compatible input CMOS = CMOS compatible input or output ST = Schmitt Trigger input with CMOS levels I = Input O = Output P = Power Note 1: Default assignment for CCP2 when configuration bit CCP2MX is set. 2: Alternate assignment for CCP2 when configuration bit CCP2MX is cleared. |
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