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전자부품 데이터시트 검색엔진 |
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전자부품 데이터시트 검색엔진 |
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PIC18F44J10-E/ML 데이터시트(PDF) 194 Page - Microchip Technology |
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PIC18F44J10-E/ML 데이터시트(HTML) 194 Page - Microchip Technology |
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194 / 358 page  PIC18F45J10 FAMILY DS39682C-page 192 Preliminary © 2007 Microchip Technology Inc. EXAMPLE 16-1: CALCULATING BAUD RATE ERROR TABLE 16-2: REGISTERS ASSOCIATED WITH BAUD RATE GENERATOR For a device with FOSC of 16 MHz, desired baud rate of 9600, Asynchronous mode, 8-bit BRG: Desired Baud Rate = FOSC/(64 ([SPBRGH:SPBRG] + 1)) Solving for SPBRGH:SPBRG: X= ((FOSC/Desired Baud Rate)/64) – 1 = ((16000000/9600)/64) – 1 = [25.042] = 25 Calculated Baud Rate = 16000000/(64 (25 + 1)) = 9615 Error = (Calculated Baud Rate – Desired Baud Rate)/Desired Baud Rate = (9615 – 9600)/9600 = 0.16% Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Reset Values on page TXSTA CSRC TX9 TXEN SYNC SENDB BRGH TRMT TX9D 45 RCSTA SPEN RX9 SREN CREN ADDEN FERR OERR RX9D 45 BAUDCON ABDOVF RCIDL — SCKP BRG16 — WUE ABDEN 45 SPBRGH EUSART Baud Rate Generator Register High Byte 45 SPBRG EUSART Baud Rate Generator Register Low Byte 45 Legend: — = unimplemented, read as ‘0’. Shaded cells are not used by the BRG. |
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