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PIC16F883 데이터시트(PDF) 74 Page - Microchip Technology |
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PIC16F883 데이터시트(HTML) 74 Page - Microchip Technology |
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74 / 288 page ![]() PIC16F882/883/884/886/887 41291D-page 72 Preliminary © 2007 Microchip Technology Inc. FIGURE 4-9: FSCM TIMING DIAGRAM TABLE 4-2: SUMMARY OF REGISTERS ASSOCIATED WITH CLOCK SOURCES OSCFIF System Clock Output Sample Clock Failure Detected Oscillator Failure Note: The system clock is normally at a much higher frequency than the sample clock. The relative frequencies in this example have been chosen for clarity. (Q) Test Test Test Clock Monitor Output Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Value on POR, BOR Value on all other Resets(1) CONFIG1(2) CPD CP MCLRE PWRTE WDTE FOSC2 FOSC1 FOSC0 — — OSCCON — IRCF2 IRCF1 IRCF0 OSTS HTS LTS SCS -110 x000 -110 x000 OSCTUNE — — — TUN4 TUN3 TUN2 TUN1 TUN0 ---0 0000 ---u uuuu PIE2 OSFIE C2IE C1IE EEIE BCLIE ULPWUIE — CCP2IE 0000 00-0 0000 00-0 PIR2 OSFIF C2IF C1IF EEIF BCLIF ULPWUIF — CCP2IF 0000 00-0 0000 00-0 Legend: x = unknown, u = unchanged, – = unimplemented locations read as ‘0’. Shaded cells are not used by oscillators. Note 1: Other (non Power-up) Resets include MCLR Reset and Watchdog Timer Reset during normal operation. 2: See Configuration Word Register 1 (Register 14-1) for operation of all register bits. |
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