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DSPIC30F2011 데이터시트(PDF) 161 Page - Microchip Technology

부품명 DSPIC30F2011
상세설명  High-Performance, 16-Bit Digital Signal Controllers
PDF  205 Pages
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제조업체  MICROCHIP [Microchip Technology]
홈페이지  http://www.microchip.com
Logo MICROCHIP - Microchip Technology

DSPIC30F2011 데이터시트(HTML) 161 Page - Microchip Technology

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© 2006 Microchip Technology Inc.
DS70139E-page 159
dsPIC30F2011/2012/3012/3013
TABLE 20-18: AC CHARACTERISTICS: INTERNAL RC ACCURACY(2)
AC CHARACTERISTICS
Standard Operating Conditions: 2.5V to 5.5V
(unless otherwise stated)
Operating temperature
-40°C
≤ TA ≤ +85°C for Industrial
-40°C
≤ TA ≤ +125°C for Extended
Param
No.
Characteristic
Min
Typ
Max
Units
Conditions
Internal FRC Jitter @ FRC Freq. = 7.37 MHz(1)
OS62
FRC
—
+0.04
+0.16
%
-40°C
≤ TA ≤ +85°C
VDD = 3.0-3.6V
—+0.07
+0.23
%
-40°C
≤ TA ≤ +125°C
VDD = 4.5-5.5V
FRC with 4x PLL
—
+0.31
+0.62
%
-40°C
≤ TA ≤ +85°C
VDD = 3.0-3.6V
—+0.34
+0.77
%
-40°C
≤ TA ≤ +125°C
VDD = 4.5-5.5V
FRC with 8x PLL
—
+0.44
+0.87
%
-40°C
≤ TA ≤ +85°C
VDD = 3.0-3.6V
—+0.48
+1.08
%
-40°C
≤ TA ≤ +125°C
VDD = 4.5-5.5V
FRC with 16x PLL
—
+0.71
+1.23
%
-40°C
≤ TA ≤ +125°C
VDD = 4.5-5.5V
Internal FRC Accuracy @ FRC Freq. = 7.37 MHz(1)
OS63
FRC
—
—
+1.50
%
-40°C
≤ TA ≤ +125°C
VDD = 3.0-5.5V
Internal FRC Drift @ FRC Freq. = 7.37 MHz(1)
OS64
-0.7
—
0.5
%
-40°C
≤ TA ≤ +85°C
VDD = 3.0-3.6V
-0.7
—
0.7
%
-40°C
≤ TA ≤ +125°C
VDD = 3.0-3.6V
-0.7
—
0.5
%
-40°C
≤ TA ≤ +85°C
VDD = 4.5-5.5V
-0.7
—
0.7
%
-40°C
≤ TA ≤ +125°C
VDD = 4.5-5.5V
Note 1:
Frequency calibrated at 7.372 MHz ±2%, 25°C and 5V. TUN bits (OSCCON<3:0>) can be used to
compensate for temperature drift.
2:
Overall FRC variation can be calculated by adding the absolute values of jitter, accuracy and drift
percentages.
TABLE 20-19: INTERNAL RC ACCURACY
AC CHARACTERISTICS
Standard Operating Conditions: 2.5V to 5.5V
(unless otherwise stated)
Operating temperature
-40°C
≤ TA ≤ +85°C for Industrial
-40°C
≤ TA ≤ +125°C for Extended
Param
No.
Characteristic
Min
Typ
Max
Units
Conditions
LPRC @ Freq. = 512 kHz(1)
OS65
-35
—
+35
%
—
Note 1:
Change of LPRC frequency as VDD changes.



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