C32

1uF

C34

18pF

R13

1K

TUSB8020B

U1D

XI

38

XO

39

SCL / SMBCLK

2

SDA / SMBDAT

3

TEST

10

GRSTZ

11

USB_R1

24

R12

9.53K

0402

1%

C33

18pF

Y1

24MHz

R11

1M

Copyright © 2017, Texas Instruments Incorporated

Limiting DS Port VBUS current to 2.2A per port.

PWRCTRL1_BATEN1

PWRCTRL2_BATEN2

ILIM1

DN1_VBUS

DN2_VBUS

BOARD_3P3V

BOARD_5V

BOARD_3P3V

PWRCTRL2_BATEN2

DN2_VBUS

DN1_VBUS

PWRCTRL1_BATEN1

OVERCUR2Z

OVERCUR1Z

C36

0.1uF

R19

10K

0402

5%

+

C38

150uF

U3

TPS2561

GND

1

IN

2

IN

3

EN1

4

EN2

5

FAULT2Z

6

ILIM

7

OUT2

8

OUT1

9

FAULT1Z

10

PAD

11

C37

0.1uF

R21

25.5K

0402

5%

+

C40

150uF

C39

0.1uF

R20

10K

0402

5%

Copyright © 2017, Texas Instruments Incorporated

28

TUSB8020B

SLLSEF6C – JULY 2014 – REVISED JUNE 2017

www.ti.com

Product Folder Links: TUSB8020B

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Copyright © 2014–2017, Texas Instruments Incorporated

9.2.2.4 VBUS Power Switch Implementation

This particular example uses the TI TPS2561 dual-channel precision adjustable current-limited power switch. For

details on this power switch or other power switches available from TI, refer to www.ti.com.

Figure 30. Power Switch Implementation

9.2.2.5 Clock, Reset, and Miscellaneous

Figure 31. Clock, Reset, and Miscellaneous