STW5094ADTLF datasheet(3/51 Pages) STMICROELECTRONICS

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STw5094A

TABLE OF CONTENT

PIN CONNECTIONS (TOP VIEW) ................................................................................... 4

FUNCTIONAL BLOCK DIAGRAM .................................................................................... 5

SIGNAL DESCRIPTION ................................................................................................... 6

FUNCTIONAL DESCRIPTION ......................................................................................... 8

PROGRAMMABLE REGISTERS ................................................................................... 15

TIMING DIAGRAMS ....................................................................................................... 25

ABSOLUTE MAXIMUM RATINGS ................................................................................. 33

OPERATIVE SUPPLY VOLTAGES ................................................................................ 33

TIMING SPECIFICATIONS ............................................................................................ 33

AMCK timing

MCLK and AUXCLK timing

Audio interface signals timing

PCM interface timing

I2C bus control port timing

ELECTRICAL CHARACTERISTICS ............................................................................... 36

Digital Interfaces (Figure 16)

Analog Interfaces

ANALOG INPUT/OUTPUT OPERATIVE RANGES ....................................................... 37

Microphone Input Levels - Absolute levels at MIC1, MIC2, MIC3

FM Input Levels - Absolute levels at FML, FMR

Power Output Levels - Absolute levels at LSP-LSN (Differentially measured)

Tones Levels

VOICE CODEC CHARACTERISTICS ............................................................................ 38

VOICE CODEC AMPLITUDE RESPONSE

VOICE CODEC AMPLITUDE RESPONSE (continued)

VOICE CODEC ENVELOPE DELAY DISTORTION WITH FREQUENCY

VOICE CODEC NOISE

VOICE CODEC CROSSTALK

VOICE CODEC DISTORTION

STEREO AUDIO DAC and FM CHARACTERISTICS

POWER DISSIPATION

TFBGA PACKAGE OUTLINE ......................................................................................... 48

REVISION HISTORY ...................................................................................................... 50

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