UMA1015MSLASHC2 datasheet(2/24 Pages) PHILIPS

2 / 24 page

1995 Jun 22

Philips Semiconductors

Product speciﬁcation

Low-power dual frequency synthesizer

for radio communications

UMA1015M

FEATURES

• Two fully programmable RF dividers up to 1.1 GHz

• Fully programmable reference divider up to 35 MHz

• 2 : 1 or 1 : 1 ratio of selectable reference frequencies

• Fast three-line serial bus interface

• Adjustable phase comparator gain

• Programmable out-of-lock indication for both loops

• On-chip voltage doubler

• Low current consumption from 3 V supply

• Separate power-down mode for each synthesizer

• Up to 4 open-drain output ports.

APPLICATIONS

• Cordless telephone

• Hand-held mobile radio.

GENERAL DESCRIPTION

The UMA1015M is a low-power dual frequency

synthesizer for radio communications which operates in

the 50 to 1100 MHz frequency range. Each synthesizer

consists of a fully programmable main divider, a phase and

frequency detector and a charge pump. There is a fully

programmable reference divider common to both

synthesizers which operates up to 35 MHz. The device is

programmed via a 3-wire serial bus which operates up to

10 MHz. The charge pump currents (gains) are fixed by an

external resistance at pin 20 (ISET). The BiCMOS device is

designed to operate from 2.6 V (3 Ni-Cd cells) to 5.5 V at

low current. Digital supplies VDD1 and VDD2 must be at the

same potential. The charge pump supply (VCC) can be

provided by an external source or on-chip voltage doubler.

VCC must be equal to or higher than VDD1. Each

synthesizer can be powered-down independently via the

serial bus to save current. It is also possible to power-down

the device via the HPD input (pin 5).

QUICK REFERENCE DATA

SYMBOL

PARAMETER

CONDITIONS

MIN.

TYP.

MAX.

UNIT

VDD1, VDD2

digital supply voltage

VDD1 =VDD2

2.6

−

5.5

VCC

charge pump supply

voltage

external supply; doubler

disabled; VCC ≥ VDD

2.6

−

6.0

VCCvd

charge pump supply from

voltage doubler

doubler enabled

−

2VDD1 − 0.6 6.0

IDDO1 +IDDO2 +

ICCO

operating supply current

both synthesizers ON; doubler

disabled; VDD1 =VDD2 = 5.5 V

−

9.6

−

IDD1pd + IDD2pd

+ ICCpd

current in power-down

mode per supply

doubler disabled;

VDD1 =VDD2 = 5.5 V

−

0.01

−

IDD1pd

current in power-down

mode from supply VDD

doubler enabled;

VDD1 =VDD2 =3V

−

0.15

−

fRFA, fRFB

RF input frequency for

each synthesizer

−

1100

MHz

fXTALIN

crystal input frequency

−

MHz

fpc(min)

minimum phase

comparator frequency

fRF = 50 to 1100 MHz;

fXTALIN =3to35MHz

−

kHz

fpc(max)

maximum phase

comparator frequency

fRF = 50 to 1100 MHz;

fXTALIN =3to35MHz

−

750

−

kHz

Tamb

operating ambient

temperature

synthesizer A

2.6 V

≤ VDD ≤ 5.5 V

−30

−

+85

°C

synthesizer B

2.6 V

≤ VDD ≤ 4.5 V

−30

−

+85

°C

synthesizer B

2.6 V

≤ V

DD ≤ 5.0 V

−

+85

°C

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