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ADL8142ACPZN-R7 데이터시트(PDF) 17 Page - Analog Devices |
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ADL8142ACPZN-R7 데이터시트(HTML) 17 Page - Analog Devices |
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17 / 20 page ![]() Data Sheet ADL8142 APPLICATIONS INFORMATION analog.com Rev. B | 17 of 20 The basic connections for operating the ADL8142 over the speci- fied frequency range are shown in Figure 64. No external biasing inductor is required, allowing the 2 V supply to be connected to the VDD pin. It is recommended to use 0.1 µF and 100 pF power supply decoupling capacitors. The power supply decoupling capacitors shown in Figure 64 represent the configuration used to characterize and qualify the ADL8142. To set IDQ, connect a resistor (R2) between the RBIAS and VDD pins. A default value of 634 Ω is recommended, which results in a nominal IDQ of 25 mA. The RBIAS pin also draws a current that varies with the value of RBIAS, and this current is typically a few mA. Do not leave the RBIAS pin open. The RFIN and RFOUT pins are internally ac-coupled. If the RFOUT pin is connected to a dc bias level other than 0 V, ac-couple this pin because of the internal dc path to ground on RFOUT. Figure 64. Typical Application Circuit RECOMMENDED BIAS SEQUENCING See the ADL8142-EVALZ user guide for the recommended bias sequencing information. Table 8. Recommended Bias Resistor Values for VDD = 2 V RBIAS (Ω) IDQ (mA) IDQ_AMP (mA) IRBIAS (mA) 203 50 45 5 301 40 36.2 3.8 487 30 27.5 2.5 634 25 23.0 2.0 909 20 18.5 1.5 1500 15 14.1 0.9 |
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