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전자부품 데이터시트 검색엔진 |
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전자부품 데이터시트 검색엔진 |
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CS44800 데이터시트(PDF) 14 Page - Cirrus Logic |
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CS44800 데이터시트(HTML) 14 Page - Cirrus Logic |
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14 / 80 page  14 DS632F1 CS44800 SWITCHING CHARACTERISTICS - CONTROL PORT - I²C FORMAT (VD = 2.5 V, VDX = VDP = VLS = 3.3 V; VLC = 2.5 V to 5.0 V; Inputs: Logic 0 = GND, Logic 1 = VLC, CL =30pF) 18. Data must be held for sufficient time to bridge the transition time, tf, of SCL. Parameter Symbol Min Max Unit SCL Clock Frequency fscl - 100 kHz Bus Free Time between Transmissions tbuf 4.7 - µs Start Condition Hold Time (prior to first clock pulse) thdst 4.0 - µs Clock Low time tlow 4.7 - µs Clock High Time thigh 4.0 - µs Setup Time for Repeated Start Condition tsust 4.7 - µs SDA Hold Time from SCL Falling (Note 18) thdd 10 - ns SDA Setup time to SCL Rising tsud 250 - ns Rise Time of SCL and SDA tr -1000 ns Fall Time SCL and SDA tf -300 ns Setup Time for Stop Condition tsusp 4.7 - µs t buf t hdst t hdst t low t r t f t hdd t high t sud t sust t susp Stop Start Start Stop Repeated SDA SCL Figure 8. Control Port Timing - I²C Format |
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