| 전자부품 데이터시트 검색엔진 |
|
STAC9271 데이터시트(PDF) 53 Page - Integrated Device Technology |
|
|
|||||||||||||||||||||||||||||
STAC9271 데이터시트(HTML) 53 Page - Integrated Device Technology |
|
53 / 223 page ![]() STAC9271/9272/9273/9274 10-CHANNEL HIGH DEFINITION AUDIO CODEC PC AUDIO IDT™ 10-CHANNEL HIGH DEFINITION AUDIO CODEC 53 STAC9271/9272/9273/9274 V 1.0 MARCH2007 IDT CONFIDENTIAL 6.2.25. AFG DMic [2] OD2 RW 0x0 GPIO2 Drive Mode; 0= push-pull (drive 0 and 1), 1= open drain (drive 0, float for 1). [1] OD1 RW 0x0 GPIO1 Drive Mode; 0= push-pull (drive 0 and 1), 1= open drain (drive 0, float for 1). [0] OD0 RW 0x0 GPIO0 Drive Mode; 0= push-pull (drive 0 and 1), 1= open drain (drive 0, float for 1). Table 62. AFG DMic Command Verb Format Verb ID Payload Response Get FF0 00 See bitfield table. Set1 7F0 See bits [7:0] of bitfield table. 0000_0000h Table 63. AFG DMic Command Response Format Bit Bitfield Name RW Reset Description [31.:4] Rsvd R 0x0 Reserved [3.:2] PhAdj RW 0x0 Selects what phase of the DigMic clock the data should be latched: 0= rising edge, 1= center of high, 2= falling edge, 3= center of low. [1.:0] Rate RW 0x2 Selects the DigMic rate: 0= 4.704 MHz, 1= 3.528 MHz, 2= 2.352 MHz, 3= 1.176 MHz. Table 61. AFG GPIODrive Command Response Format Bit Bitfield Name RW Reset Description |
|
링크 URL |
| ALLDATASHEET 가 귀하에 도움이 되셨나요? [ DONATE ] |
Alldatasheet는? | 광고문의 | 운영자에게 연락하기 | 개인정보취급방침 | 링크 투 데이터시트 | 링크교환 | 제조사별 검색 All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |