P4C147

Page 3 of 10

Document # SRAM103 REV A

Min

Notes:

1. Stresses greater than those listed under MAXIMUM RATINGS may

cause permanent damage to the device. This is a stress rating only

and functional operation of the device at these or any other conditions

above those indicated in the operational sections of this specification

is not implied. Exposure to MAXIMUM rating conditions for extended

periods may affect reliability.

2. Extended temperature operation guaranteed with 400 linear feet per

minute of air flow.

3. Transient inputs with V

–100mA, respectively, are permissible for pulse widths up to 20 ns.

4. This parameter is sampled and not 100% tested.

5. CE is LOW and WE is HIGH for READ cycle.

6. WE is HIGH, and address must be valid prior to or coincident with CE

transition LOW.

7. Transition is measured ±200mV from steady state voltage prior to

change with specified loading in Figure 1. This parameter is sampled

and not 100% tested.

8. Read Cycle Time is measured from the last valid address to the first

transitioning address.

TIMING WAVEFORM OF READ CYCLE NO. 2

(6)

Sym.

t

RC

t

AA

t

AC

t

HZ

t

PU

t

PD

Read Cycle Time

Chip Enable Access Time

Output Hold from

Address Change

Chip Enable to

Output in Low Z

Chip Disable to

Output in High Z

Chip Enable to

Power Up Time

Chip Disable to

Power Down Time

-10

-12

-15

-20

-25

-35

Unit

ns

ns

ns

ns

ns

ns

ns

ns

Min

Max

10

10

4

10

10

2

2

0

AC CHARACTERISTICS—READ CYCLE

(V

(2)

12

2

2

0

Max

12

12

5

12

Min

15

2

2

0

Max

15

15

6

15

Min

20

2

2

0

Max

20

20

8

20

Min

25

2

2

0

Max

25

25

10

25

Min

35

2

2

0

Max

35

35

14

35

Parameter

Address Access Time

t

OH

t

LZ