전자부품 데이터시트 검색엔진
  Korean  ▼
ALLDATASHEET.CO.KR

X  

Preview PDF HTML

LP3950SL 데이터시트(PDF) 20 Page - National Semiconductor (TI)

[Old version datasheet] Texas Instruments acquired National semiconductor.
부품명 LP3950SL
상세설명  Color LED Driver with Audio Synchronizer
PDF  31 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
제조업체  NSC [National Semiconductor (TI)]
홈페이지  http://www.national.com
Logo NSC - National Semiconductor (TI)

LP3950SL 데이터시트(HTML) 20 Page - National Semiconductor (TI)

Back Button LP3950SL Datasheet HTML 16Page - National Semiconductor (TI) LP3950SL Datasheet HTML 17Page - National Semiconductor (TI) LP3950SL Datasheet HTML 18Page - National Semiconductor (TI) LP3950SL Datasheet HTML 19Page - National Semiconductor (TI) LP3950SL Datasheet HTML 20Page - National Semiconductor (TI) LP3950SL Datasheet HTML 21Page - National Semiconductor (TI) LP3950SL Datasheet HTML 22Page - National Semiconductor (TI) LP3950SL Datasheet HTML 23Page - National Semiconductor (TI) LP3950SL Datasheet HTML 24Page - National Semiconductor (TI) Next Button
Zoom Inzoom in Zoom Outzoom out
 20 / 31 page
background image
Audio Synchronization (Continued)
INPUT BUFFERING
Figure 16 describes the LP3950 audio input buffering struc-
ture in high level. The electric parameters of the buffers are
described in Table Audio Synchronization Characteristics.
Operational amplifiers for both buffers are rail-to-rail input
opamps. The single ended buffer is simply a voltage follower.
DC level of the input signal is generated by a resistor divider.
The differential amplifier is a basic differential-to-single-
ended converter.
AUDIO SYNCHRONIZATION SIGNAL PATH
LP3950 audio synchronization is mainly done digitally and it
consists of following signal path blocks (see Figure 17)
•
Input buffers
•
Multiplexer
•
AD converter
•
DC remover
•
Automatic gain control (AGC) / programmable gain
•
3 band digital filter
•
Peak detector
•
Look-up tables (LUT)
•
Mode selector
•
Integrators
•
PWM generator
The digitized input signal has a DC component that is re-
moved by the digital DC REMOVER (-3 dB @
A400 Hz). The
automatic GAIN CONTROL adjusts the input signal to suit-
able range automatically. User can disable AGC and the gain
can be set manually with PROGRAMMABLE GAIN. The
LP3950 has two audio synchronization modes: amplitude
and frequency. For amplitude based synchronization the
PEAK DETECTION method is used. For frequency based
synchronization the three-way crossover FILTER separates
high pass, low pass and band pass signals. For both modes,
a predefined lookup table (LUT) is used to match the audio
visual effect. The MODE SELECTOR selects the synchroni-
zation mode. Reaction speed can be selected using INTE-
GRATOR speed variables. Finally PWM GENERATOR sets
the driver FETs duty cycles.
Schematic Diagram
20129331
FIGURE 16. Audio Input Buffer Structure
Functional Block Diagram
20129332
FIGURE 17. Signal Path Block Diagram
www.national.com
20



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31


데이터시트 다운로드

Go To PDF Page


링크 URL



ALLDATASHEET 가 귀하에 도움이 되셨나요?  [ DONATE ] 

Alldatasheet는?   |   광고문의   |   운영자에게 연락하기   |   개인정보취급방침   |   링크 투 데이터시트    |   링크교환   |   제조사별 검색
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com